Commits · f57ae33381f27445d2b174bfae2cd94d49852398 · Roger Ferrer / llvm-epi · GitLab

Mar 27, 2017
- [X86][AVX2] bugzilla bug 21281 Performance regression in vector interleave in AVX2 · 89d5f939
  Gadi Haber authored Mar 27, 2017
  89d5f939
Mar 26, 2017
- [Target] Remove some code probably copy/pasted from another backend. · a2c4e4b9
  Davide Italiano authored Mar 26, 2017
  a2c4e4b9
- [MachineScheduler] Reference the correct header. · 5c2aa5d3
  Davide Italiano authored Mar 26, 2017
  5c2aa5d3
- [X86][SSE] Add computeKnownBitsForTargetNode support for (V)PSLL/(V)PSRL instructions · 92925ea7
  Simon Pilgrim authored Mar 26, 2017
  92925ea7
- [X86][AVX512F] Fix reg class for VMOVSSZrr/VMOVSSZrrk and VMOVSDZrr/VMOVSDZrrk · 049d9c92
  Simon Pilgrim authored Mar 26, 2017
  049d9c92
- [GlobalISel][X86] support G_FRAME_INDEX instruction selection. · 531a203a
  Igor Breger authored Mar 26, 2017
  531a203a
Mar 25, 2017
- [X86] Pull out repeated ScalarValueSizeInBits code. NFCI. · bec234c9
  Simon Pilgrim authored Mar 25, 2017
  bec234c9
- [X86][SSE] Combine (VSRLI (VSRAI X, Y), (NumSignBits-1)) -> (VSRLI X, (NumSignBits-1)) · c0720a40
  Simon Pilgrim authored Mar 25, 2017
  c0720a40
- [X86][SSE] Added ComputeNumSignBitsForTargetNode support for (V)PSRAI · 6397963c
  Simon Pilgrim authored Mar 25, 2017
  6397963c
- [X86][SSE] Generalised CMP+AND1 combine to ZERO/ALLBITS+MASK · 5400a4d0
  Simon Pilgrim authored Mar 25, 2017
  5400a4d0
- [x86] use PMOVMSK to replace memcmp libcalls for 16-byte equality · 9ebb6884
  Sanjay Patel authored Mar 25, 2017
  9ebb6884
- [AArch64] Refine Falkor Machine Model - Part1 · cf0e5e1c
  Balaram Makam authored Mar 25, 2017
  cf0e5e1c
- [AMDGPU] Switch data layout by triple environment amdgiz · 14834c3e
  Yaxun Liu authored Mar 25, 2017
  14834c3e
- [ARM] Fix mixup between Lo and Hi in SMLALBB formation. · 95ddd187
  Eli Friedman authored Mar 25, 2017
  95ddd187
- [Outliner] Revert r298734. · eac8633d
  Jessica Paquette authored Mar 24, 2017
  eac8633d
Mar 24, 2017
- AMDGPU: Fix annotating loops with nested loop conditions · 0607a442
  Matt Arsenault authored Mar 24, 2017
  0607a442
- [Outliner] Remove no red zone requirment for AArch64 · 167af85e
  Jessica Paquette authored Mar 24, 2017
  167af85e
- AMDGPU: Implement f16 fround · b5d23271
  Matt Arsenault authored Mar 24, 2017
  b5d23271
- AMDGPU: Unify divergent function exits. · b8f8dbc2
  Matt Arsenault authored Mar 24, 2017
  b8f8dbc2
- TTI: Split IsSimple in MemIntrinsicInfo · 18bb24a1
  Matt Arsenault authored Mar 24, 2017
  18bb24a1
- [AMDGPU] Fold V_CNDMASK with identical source operands · 70603dce
  Stanislav Mekhanoshin authored Mar 24, 2017
  70603dce
- [AMDGPU] Rename Kind to ValueKind in metadata to be consistent · 4986d9fb
  Konstantin Zhuravlyov authored Mar 24, 2017
  4986d9fb
- [AMDGPU] Add AMDGPUAliasAnalysis to opt pipeline · a27b2cac
  Stanislav Mekhanoshin authored Mar 24, 2017
  a27b2cac
- [AMDGPU] Don't enforce constexpr, there are still old standard libraries... · 80e3d5bb
  Benjamin Kramer authored Mar 24, 2017
  80e3d5bb
- [AMDGPU] Remove double map lookups in SI scheduler · e2419dc9
  Valery Pykhtin authored Mar 24, 2017
  e2419dc9
- [AMDGPU] Fix SGPR usage count in SI scheduler · f7d1023a
  Valery Pykhtin authored Mar 24, 2017
  f7d1023a
- [AMDGPU] Add a new line after a debug message · 57ab6999
  Valery Pykhtin authored Mar 24, 2017
  57ab6999
- [X86][SSE] Generalised lowerTruncate by PACKSS to work with any 'zero/all... · 6aac6463
  Simon Pilgrim authored Mar 24, 2017
  6aac6463
- Don't build up std::vectors with constant sizes when an array suffices. · c06d672a
  Benjamin Kramer authored Mar 24, 2017
  c06d672a
- [AVR] Fix build after r298178 · 5d3c599e
  Meador Inge authored Mar 24, 2017
  5d3c599e
- [Hexagon] Avoid infinite loops in HexagonLoopIdiomRecognition · 10fbac00
  Krzysztof Parzyszek authored Mar 23, 2017
  10fbac00
Mar 23, 2017
- Kill some trailing whitespace to make some new changes a bit easier. · c78be4d3
  Eric Christopher authored Mar 23, 2017
  c78be4d3
- [X86] Fix Stale SDNode use in X86ISelDAGtoDAG · 9ebefeb9
  Nirav Dave authored Mar 23, 2017
  9ebefeb9
- Remove the subtarget argument from LowerFP_TO_INT since there's one · cff84924
  Eric Christopher authored Mar 23, 2017
  cff84924
- Remove unused X86Subtarget argument from getOnesVector. · a19a14b4
  Eric Christopher authored Mar 23, 2017
  a19a14b4
- [ARM] Fix computeKnownBits for ARMISD::CMOV · bc264827
  Pirama Arumuga Nainar authored Mar 23, 2017
  bc264827
- [X86][SSE] Extract elements from narrower shuffle masks. · 1c048ab6
  Simon Pilgrim authored Mar 23, 2017
  1c048ab6
- [GlobalISel][X86] Support G_STORE/G_LOAD operation · a8ba572d
  Igor Breger authored Mar 23, 2017
  a8ba572d
- X86FixupBWInsts: Minor cleanup. NFC · db4b0322
  Zvi Rackover authored Mar 23, 2017
  db4b0322
- [Mips] Emit the correct DINS variant · f9fa62e5
  Strahinja Petrovic authored Mar 23, 2017
  f9fa62e5