Commits · f77219e03593bb999a724aa3438ab8538049c6cd · Roger Ferrer / llvm-epi · GitLab

Feb 13, 2017
- [X86][AVX512] Fix operand classes for some AVX512 instructions to keep... · f77219e0
  Ayman Musa authored Feb 13, 2017
  f77219e0
- [X86] Genericize the handling of INSERT_SUBVECTOR from an EXTRACT_SUBVECTOR to... · 680c73e7
  Craig Topper authored Feb 13, 2017
  680c73e7
- [X86] Don't let LowerEXTRACT_SUBVECTOR call getNode for EXTRACT_SUBVECTOR. · 53eafa8e
  Craig Topper authored Feb 12, 2017
  53eafa8e
Feb 12, 2017
- [X86] Fix typo in function name. NFCI. · cc9242bd
  Simon Pilgrim authored Feb 12, 2017
  cc9242bd
- [AVX-512] Add various EVEX move instructions to load folding tables using the... · cfe8ce3a
  Craig Topper authored Feb 12, 2017
  cfe8ce3a
- [AVX-512] Add VMOV64toSDZrm CodeGenOnly instruction based on the same instruction from AVX/SSE. · 5971b548
  Craig Topper authored Feb 12, 2017
  5971b548
- [X86] Fix a couple instruction names to use 'mr' instead of 'rm' to indicate... · ec268014
  Craig Topper authored Feb 12, 2017
  ec268014
- [AVX-512] Add VPEXTRD/Q to load folding tables. · 6eca3170
  Craig Topper authored Feb 12, 2017
  6eca3170
- [X86][SSE] Update argument names to match function name. NFCI. · 04ec0f2b
  Simon Pilgrim authored Feb 12, 2017
  04ec0f2b
- [X86][AVX2] Add support for combining target shuffles to VPMOVZX · 4cd84175
  Simon Pilgrim authored Feb 12, 2017
  4cd84175
- AMDGPU::expandMemIntrinsicUses(): Fix an uninitialized variable. This function... · 022c6e4f
  NAKAMURA Takumi authored Feb 12, 2017
  022c6e4f
- AVX-512: Fixed DWARF register numbers for XMM16-31 · 5d91ab46
  Elena Demikhovsky authored Feb 12, 2017
  5d91ab46
Feb 11, 2017
- [X86] Move code for using blendi for insert_subvector out to an isel pattern.... · 1c37e991
  Craig Topper authored Feb 11, 2017
  1c37e991
- [X86][SSE] Use VSEXT/VZEXT constant folding for SIGN_EXTEND_VECTOR_INREG/ZERO_EXTEND_VECTOR_INREG · 755d9127
  Simon Pilgrim authored Feb 11, 2017
  755d9127
- [X86][SSE] Improve VSEXT/VZEXT constant folding. · 437d64c4
  Simon Pilgrim authored Feb 11, 2017
  437d64c4
- [X86][SSE] Add early-out when trying to match blend shuffle. NFCI. · 4ef9672f
  Simon Pilgrim authored Feb 11, 2017
  4ef9672f
- Fix indentation in X86ISelLowering. NFC · 58ce15ab
  Amaury Sechet authored Feb 11, 2017
  58ce15ab
- [AVX-512] Add VPMINS/MINU/MAXS/MAXU instructions to load folding tables. · 25534348
  Craig Topper authored Feb 11, 2017
  25534348
- [X86] Improve alphabetizing of load folding tables. NFC · b2fa216d
  Craig Topper authored Feb 11, 2017
  b2fa216d
- [X86][SSE] Convert getTargetShuffleMaskIndices to use getTargetConstantBitsFromNode. · 0e6945e4
  Simon Pilgrim authored Feb 11, 2017
  0e6945e4
- [X86] Merge repeated getScalarValueSizeInBits calls. NFCI. · d59fa0e3
  Simon Pilgrim authored Feb 11, 2017
  d59fa0e3
- [X86][3DNow!] Enable PFSUB<->PFSUBR commutation · 6411a0eb
  Simon Pilgrim authored Feb 11, 2017
  6411a0eb
- [X86][3DNow!] Enable commutation for PFADD/PFMUL/PFCMPEQ/PAVGUSB/PMULHRW · 4ead1d4a
  Simon Pilgrim authored Feb 11, 2017
  4ead1d4a
- Fix "left shift of negative value -1" introduced by r294805 · bcb6622c
  Vitaly Buka authored Feb 11, 2017
  bcb6622c
- Move symbols from the global namespace into (anonymous) namespaces. NFC. · efcf06f5
  Benjamin Kramer authored Feb 11, 2017
  efcf06f5
- [AVX-512] Add VPINSRB/W/D/Q instructions to load folding tables. · 1f6153ba
  Craig Topper authored Feb 11, 2017
  1f6153ba
- [AVX-512] Fix apparent typo in instruction name VMOVSSDrr_REV->VMOVSDZrr_REV. · a9818aad
  Craig Topper authored Feb 11, 2017
  a9818aad
- [AVX-512] Add VPSADBW instructions to load folding tables. · 3afa777f
  Craig Topper authored Feb 11, 2017
  3afa777f
- [X86] Don't base domain decisions on VEXTRACTF128/VINSERTF128 if only AVX1 is available. · 464b8cb2
  Craig Topper authored Feb 11, 2017
  464b8cb2
- [ARM] Make f16 interleaved accesses expensive. · 8425f453
  Ahmed Bougacha authored Feb 11, 2017
  8425f453
- [ARM] Don't lower f16 interleaved accesses. · fc979dc9
  Ahmed Bougacha authored Feb 11, 2017
  fc979dc9
- [WebAssembly] Remove old experimental disassemler code. · dfe6ce7a
  Dan Gohman authored Feb 11, 2017
  dfe6ce7a
- [Hexagon] Introduce Hexagon V62 · f9015e62
  Krzysztof Parzyszek authored Feb 10, 2017
  f9015e62
Feb 10, 2017
- [PPC] Silence warning in Release builds. · aa5adfa3
  Benjamin Kramer authored Feb 10, 2017
  aa5adfa3
- Fix a silly syntax error. · 21a960b6
  Tim Shen authored Feb 10, 2017
  21a960b6
- [XRay] Implement powerpc64le xray. · 918ed871
  Tim Shen authored Feb 10, 2017
  918ed871
- [Hexagon] Remove unused .td files · fe58ca32
  Krzysztof Parzyszek authored Feb 10, 2017
  fe58ca32
- [X86] Bitcast subvector before broadcasting it. · 2e275e27
  Ahmed Bougacha authored Feb 10, 2017
  2e275e27
- [ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic · e60f4e4b
  John Brawn authored Feb 10, 2017
  e60f4e4b
- [Hexagon] Replace instruction definitions with auto-generated ones · a72fad98
  Krzysztof Parzyszek authored Feb 10, 2017
  a72fad98