Commits · f79b81fbe2870ff631ad72a75f7e077b15b52a22 · Roger Ferrer / llvm-epi · GitLab

Feb 26, 2020
- [llvm-objcopy] Enable --discard-all for MachO · f79b81fb
  Alexander Shaposhnikov authored Feb 26, 2020
  f79b81fb
- [dsymutil] Avoid copying swiftinterfaces from the SDK into the dsym bundle · 22cb36c8
  Adrian Prantl authored Feb 26, 2020
  22cb36c8
- [CVP] Simplify cmp of local phi node · 9d9633fb
  Nikita Popov authored Jan 03, 2020
  9d9633fb
- [CVP] Add test for cmp of local phi; NFC · 3e440545
  Nikita Popov authored Jan 03, 2020
  
  3e440545
- [AVR] Fix private label prefix · 6afc3de4
  Ayke van Laethem authored Feb 25, 2020
  6afc3de4
- [AVR] Don't adjust addresses by 2 for absolute values · 165f707f
  Ayke van Laethem authored Feb 07, 2020
  165f707f
- [InstCombine] Remove trivially empty ranges from end · 56f7de5b
  Nikita Popov authored Feb 22, 2020
  56f7de5b
- [Hexagon] Improve casting of boolean HVX vectors to scalars · 7691790d
  Krzysztof Parzyszek authored Feb 26, 2020
  7691790d
- Fix buildbots after recent GSYM commit. · e4af56db
  Greg Clayton authored Feb 26, 2020
  e4af56db
- Devirtualize a call on alloca without waiting for post inline cleanup and next · 59fb9cde
  Hiroshi Yamauchi authored Jan 31, 2020
  59fb9cde
- [PowerPC][NFC] Convert grep usage to FileCheck in lit test. · 73c3b526
  Sean Fertile authored Feb 26, 2020
  
  73c3b526
- [llvm-objcopy][test] Improve empty section tests · 6503aadc
  Fangrui Song authored Feb 19, 2020
  6503aadc
- [DAGCombiner] avoid narrowing fake fneg vector op · b3d0c798
  Sanjay Patel authored Feb 26, 2020
  b3d0c798
- [AArch64] add tests for fake fneg; NFC · 894ce940
  Sanjay Patel authored Feb 26, 2020
  894ce940
- [DAG] visitRotate - modulo non-uniform constant rotation amounts · bbb0933e
  Simon Pilgrim authored Feb 26, 2020
  
  bbb0933e
- Recommit "[DWARFDebugLine] Avoid dumping prologue members we did not parse" · ced45978
  Pavel Labath authored Feb 24, 2020
  ced45978
- [ARM,MVE] Add predicated intrinsics for many unary functions. · 9eb3cc10
  Simon Tatham authored Feb 26, 2020
  9eb3cc10
- [AIX] Remove whitelist checking for ExternalSymbolSDNodes · e7375e99
  Xiangling Liao authored Feb 26, 2020
  e7375e99
- AMDGPU: Fix some more incorrect check lines · 09a6b267
  Jay Foad authored Feb 26, 2020
  
  09a6b267
- AMDGPU/SIInsertSkips: Fix the determination of whether early-exit-after-kill is possible · 0f1df489
  Nicolai Hähnle authored Feb 21, 2020
  0f1df489
- [Assembler] Allow assembling empty index with non-zero flags · 8f8756d4
  evgeny authored Feb 26, 2020
  8f8756d4
- [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup · 9c859fc5
  Kerry McLaughlin authored Feb 26, 2020
  9c859fc5
- [AArch64] Flip default for register renaming in the ld/st optimizier. · a059be72
  Florian Hahn authored Feb 26, 2020
  a059be72
- AMDGPU: Fix some incorrect FUNC-LABEL checks · 80d7e473
  Jay Foad authored Feb 26, 2020
  
  80d7e473
- Remove no un-necessary require for load_extension.ll · d0090080
  serge-sans-paille authored Feb 26, 2020
  d0090080
- Add a llvm-gsymutil tool that can convert object files to GSYM and perform lookups. · 2f6cc21f
  Greg Clayton authored Feb 19, 2020
  2f6cc21f
- [SimpleLoopUnswitch] Fix introduction of UB when hoisted condition may be undef or poison · 181628b5
  Juneyoung Lee authored Feb 26, 2020
  181628b5
- [PowerPC] Fix the unexpected modification caused by D62993 in LowerSELECT_CC for power9 · b083d7a3
  Kang Zhang authored Feb 26, 2020
  b083d7a3
- [SelectionDAG][PowerPC][AArch64][X86][ARM] Add chain input and output the ISD::FLT_ROUNDS_ · 735d27dc
  Craig Topper authored Feb 25, 2020
  735d27dc
Feb 25, 2020
- [OpenMP][Opt] Combine `struct ident_t*` during deduplication · 396b7253
  Johannes Doerfert authored Feb 20, 2020
  396b7253
- [WebAssembly] Simplify extract_vector lowering · 0906dca4
  Thomas Lively authored Feb 21, 2020
  0906dca4
- [ObjC][ARC] Don't move a retain call living outside a loop into the loop · 430512ed
  Akira Hatanaka authored Feb 25, 2020
  430512ed
- [X86] Add test to show incorrect ordering of flt.rounds intrinsic relative to calls to fesetround. · c5ce6d8b
  Craig Topper authored Feb 25, 2020
  c5ce6d8b
- [SCEV][IndVars] Always provide insertion point to the SCEVExpander::isHighCostExpansion() · 400ceda4
  Roman Lebedev authored Feb 25, 2020
  400ceda4
- [SCEV] rewriteLoopExitValues(): even if have hard uses, still rewrite if cheap (PR44668) · 44edc6fd
  Roman Lebedev authored Feb 25, 2020
  44edc6fd
- [SCEV] SCEVExpander::isHighCostExpansionHelper(): cost-model min/max (PR44668) · d6f47aeb
  Roman Lebedev authored Feb 25, 2020
  d6f47aeb
- [SCEV] SCEVExpander::isHighCostExpansionHelper(): cost-model add/mul · 756af2f8
  Roman Lebedev authored Feb 25, 2020
  756af2f8
- [SCEV] SCEVExpander::isHighCostExpansionHelper(): cost-model plain UDiv · cc29600b
  Roman Lebedev authored Feb 25, 2020
  cc29600b
- [NFC][IndVarSimplify] Adjust value names in IndVarSimplify/exit_value_test2.ll · b8abdf9a
  Roman Lebedev authored Feb 25, 2020
  b8abdf9a
- [PhaseOrdering] add tests for missed CSE; NFC · 922558be
  Sanjay Patel authored Feb 25, 2020
  922558be