Commits · f8825577be389f1ffb4720cf2ece82784b600e95 · Roger Ferrer / llvm-epi · GitLab

Dec 06, 2018
- AArch64: Fix invalid CCMP emission · d041212c
  Matthias Braun authored Dec 06, 2018
  d041212c
- Add objc.* ARC intrinsics and codegen them to their runtime methods. · e13d0992
  Pete Cooper authored Dec 06, 2018
  e13d0992
- [GlobalISel] Introduce G_BUILD_VECTOR, G_BUILD_VECTOR_TRUNC and G_CONCAT_VECTOR opcodes. · a0b15d8f
  Amara Emerson authored Dec 05, 2018
  a0b15d8f
Dec 05, 2018
- [MachineOutliner] Outline functions by order of benefit · 962b3ae6
  Jessica Paquette authored Dec 05, 2018
  962b3ae6
- [Hexagon] Add intrinsics for Hexagon V66 · 8eb394d7
  Krzysztof Parzyszek authored Dec 05, 2018
  8eb394d7
- [Hexagon] Add instruction definitions for Hexagon V66 · 545a68ca
  Krzysztof Parzyszek authored Dec 05, 2018
  545a68ca
- [X86][SSE] Fix a copy+paste typo that was folding the sext/zext of partial vectors · c10590f6
  Simon Pilgrim authored Dec 05, 2018
  c10590f6
- AMDGPU: Fix using old address spaces in some tests · b3e14de4
  Matt Arsenault authored Dec 05, 2018
  b3e14de4
- [DAGCombiner] don't try to extract a fraction of a vector binop and crash (PR39893) · 33a448f9
  Sanjay Patel authored Dec 05, 2018
  33a448f9
- [X86] Add test case to show missed opportunity to combine a concat_vector into... · 3998bebc
  Andrea Di Biagio authored Dec 05, 2018
  3998bebc
- [SLH] Fix a nasty bug in SLH. · 71c14a36
  Chandler Carruth authored Dec 05, 2018
  71c14a36
- [SLH] Regenerate tests with --no_x86_scrub_rip to restore the higher · e3ea1646
  Chandler Carruth authored Dec 05, 2018
  e3ea1646
- [AMDGPU]: Turn on the DPP combiner by default · 5b4db77b
  Valery Pykhtin authored Dec 05, 2018
  5b4db77b
- [SelectionDAG] Initial support for FSHL/FSHR funnel shift opcodes (PR39467) · 180639af
  Simon Pilgrim authored Dec 05, 2018
  180639af
- [ARM GlobalISel] Implement call lowering for Thumb2 · 8a1b4f57
  Diana Picus authored Dec 05, 2018
  8a1b4f57
- AArch64: support funclets in fastcall and swift_call · efd2cb8a
  Saleem Abdulrasool authored Dec 05, 2018
  efd2cb8a
- [X86] Add narrow vector test cases to vector-reduce* tests. Add copies of the... · 39910898
  Craig Topper authored Dec 05, 2018
  39910898
- [MachineLICM][X86][AMDGPU] Fix subtle bug in the updating of PhysRegClobbers in post-RA LICM · 6934202d
  Craig Topper authored Dec 05, 2018
  6934202d
- [AArch64][GlobalISel] Re-enable selection of volatile loads. · 8547f4fb
  Amara Emerson authored Dec 05, 2018
  8547f4fb
Dec 04, 2018
- [PowerPC] Make no-PIC default to match GCC - LLVM · 46f840f2
  Stefan Pintilie authored Dec 04, 2018
  46f840f2
- Move llc-start-stop-instance to x86 · b17241b1
  Matt Arsenault authored Dec 04, 2018
  b17241b1
- MIR: Add method to stop after specific runs of passes · 43153024
  Matt Arsenault authored Dec 04, 2018
  43153024
- [X86][SSE] Add SimplifyDemandedBitsForTargetNode handling for MOVMSK · 07843640
  Simon Pilgrim authored Dec 04, 2018
  07843640
- Revert "Adapt gcov to changes in CFE." · 449a7f0d
  Ilya Biryukov authored Dec 04, 2018
  449a7f0d
- [X86][SSE] Add MOVMSK demandedbits/elts tests · e82c3dab
  Simon Pilgrim authored Dec 04, 2018
  e82c3dab
- [X86][NFC] Add more constant-size memcmp tests. · 7925d58e
  Clement Courbet authored Dec 04, 2018
  7925d58e
- [TargetLowering] expandFP_TO_UINT - avoid FPE due to out of range conversion (PR17686) · 0add090e
  Simon Pilgrim authored Dec 04, 2018
  0add090e
- [TargetLowering] Add SimplifyDemandedVectorElts support to EXTEND opcodes · 666261cd
  Simon Pilgrim authored Dec 04, 2018
  666261cd
- [ARM64][Windows] Fix local stack size for funclets · dc6403d1
  Sanjin Sijaric authored Dec 04, 2018
  dc6403d1
- [MachineOutliner] Move stack instr check logic to getOutliningCandidateInfo · bce2086a
  Jessica Paquette authored Dec 04, 2018
  bce2086a
Dec 03, 2018
- [Hexagon] Switch to auto-generated intrinsic definitions and patterns · 44c1f81b
  Krzysztof Parzyszek authored Dec 03, 2018
  44c1f81b
- [DAGCombiner] narrow truncated vector binops when legal · d24f6347
  Sanjay Patel authored Dec 03, 2018
  d24f6347
- [MachineOutliner] Drop candidates that require fixups if it's beneficial · 2accb316
  Jessica Paquette authored Dec 03, 2018
  2accb316
- [X86] Teach LowerMUL/LowerMULH for vXi8 to unpack constant RHS. · 5440b63f
  Craig Topper authored Dec 03, 2018
  5440b63f
- [X86] Add DAG combine to combine a v8i32->v8i16 truncate with a packuswb that... · e35b01f8
  Craig Topper authored Dec 03, 2018
  e35b01f8
- Update Diagnostic handling for changes in CFE. · 0f873eb8
  Adrian Prantl authored Dec 03, 2018
  0f873eb8
- Fix line endings. NFCI. · fb399160
  Simon Pilgrim authored Dec 03, 2018
  fb399160
- [AMDGPU] Add sdwa support for ADD|SUB U64 decomposed Pseudos · 16de4fd2
  Ron Lieberman authored Dec 03, 2018
  16de4fd2
- ARM: use target-specific SUBS node when combining cmp with cmov. · 5745b6ac
  Tim Northover authored Dec 03, 2018
  5745b6ac
- [GlobalISel] Fix test irtranslator-stackprotect-check.ll · d336c4eb
  Petr Pavlu authored Dec 03, 2018
  d336c4eb