Commits · f9348f70c2330f3565ee01134bcba1dd38628c79 · Roger Ferrer / llvm-epi · GitLab

"lld/.arcconfig" did not exist on "afbb6bd457dc922592c0e6295c578cfa16814fa2"

Jul 01, 2020
- [Docs][BasicAA] Rename some more basicaa -> basic-aa · f9348f70
  Arthur Eubanks authored Jun 30, 2020
  f9348f70
- [gn build] (semi-manually) port ce6153a5 · 679d101e
  Nico Weber authored Jun 30, 2020
  
  679d101e
- GlobalISel: Disallow undef generic virtual register uses · e9eab303
  Matt Arsenault authored Jun 28, 2020
  e9eab303
- AMDGPU/GlobalISel: Remove some selection tests which should be invalid · 291ece0e
  Matt Arsenault authored Jun 28, 2020
  291ece0e
- Fix wrong title underline length · 8b6f675f
  Arthur Eubanks authored Jun 30, 2020
  
  8b6f675f
- [gn build] Update build for new OpenMP tablegen logic · 926fab7c
  Reid Kleckner authored Jun 30, 2020
  926fab7c
- [ModuloSchedule] Make PeelingModuloScheduleExpander inheritable. · 50ac7ce9
  Hendrik Greving authored Jun 26, 2020
  50ac7ce9
- [Docs][BasicAA] Rename -basicaa to -basic-aa in docs · 3dfe1440
  Arthur Eubanks authored Jun 30, 2020
  3dfe1440
- [PPC][NFC] Replace TM with Subtarget->getTargetMachine() in preparation for GlobalISel. · 4c2c6c7c
  Kit Barton authored Jun 30, 2020
  4c2c6c7c
Jun 30, 2020
- split darwin-version-min-load-command.s into Arm64 subtest to avoid failures · c8f1d442
  Alex Lorenz authored Jun 30, 2020
  c8f1d442
- [X86] Use some preprocessor macros to reduce the very similar repeated code in getVPTESTMOpc. NFCI · 1df1186a
  Craig Topper authored Jun 30, 2020
  1df1186a
- [PowerPC][Power10] Add Vector Splat Imm/Permute/Blend/Shift Double Bit Imm Definitions and MC Tests · 73377c45
  Amy Kwan authored Jun 30, 2020
  73377c45
- [SVE] Reject vector struct indexes for scalable vectors. · df1f371e
  Eli Friedman authored Jun 23, 2020
  df1f371e
- [BitcodeReader] Fix DelayedShuffle handling for ConstantExpr shuffles. · 0ec712af
  Eli Friedman authored May 20, 2020
  0ec712af
- Sparc: Use Register · f7b2997a
  Matt Arsenault authored Jun 30, 2020
  
  f7b2997a
- RISCV: Don't store function in RISCVMachineFunctionInfo · 08649f0a
  Matt Arsenault authored Jun 30, 2020
  08649f0a
- PPC: Don't store function in PPCFunctionInfo · d9f0c366
  Matt Arsenault authored Jun 30, 2020
  d9f0c366
- Mips: Don't store MachineFunction in MipsFunctionInfo · 669bb311
  Matt Arsenault authored Jun 18, 2020
  669bb311
- [IR] Delete llvm::Constants using the correct type. · 15440191
  Eli Friedman authored Jun 24, 2020
  15440191
- [AArch64] Add getCFInstrCost, treat branches as free for throughput. · 1ccc4992
  Florian Hahn authored Jun 30, 2020
  1ccc4992
- [X86] Move frontend CPU feature initialization to a look up table based implementation. NFCI · 3537939c
  Craig Topper authored Jun 30, 2020
  3537939c
- [InstCombine] fma x, y, 0 -> fmul x, y · 9e49d1d9
  David Green authored Jun 30, 2020
  9e49d1d9
- [openmp] Move Directive and Clause helper function to tablegen · 1a70077b
  Valentin Clement authored Jun 30, 2020
  1a70077b
- [macho] emit LC_BUILD_VERSION load command for supported OSes and platforms · 24a1447b
  Alex Lorenz authored Jun 29, 2020
  24a1447b
- [llvm-install-name-tool] Add -change option · 2bdcd8b1
  Sameer Arora authored Jun 30, 2020
  2bdcd8b1
- [llvm-install-name-tool] Add -id option · ca518c49
  Sameer Arora authored Jun 30, 2020
  ca518c49
- [PDB] Defer public serialization until PDB writing · b7402edc
  Reid Kleckner authored Jun 04, 2020
  b7402edc
- [PhaseOrdering][NewPM] update test that silently showed bug with SpeculativeExecutionPass; NFC · 09b8dbf7
  Sanjay Patel authored Jun 30, 2020
  09b8dbf7
- [SVE] Remove calls to VectorType::getNumElements from AArch64 · ab35ba57
  Christopher Tetreault authored Jun 30, 2020
  ab35ba57
- [SVE] Remove calls to VectorType::getNumElements from ExecutionEngine · 9b500e56
  Christopher Tetreault authored Jun 30, 2020
  9b500e56
- Update the phabricator docs to reflect the monorepo change. · 8164f69e
  Eric Christopher authored Jun 30, 2020
  8164f69e
- [MVT] Add new MVT types for RISC-V vector. · a7b0f391
  Hsiangkai Wang authored Jun 12, 2020
  a7b0f391
- [InstCombine] New FMA tests and regenerate tests. NFC · 787b1a47
  David Green authored Jun 30, 2020
  
  787b1a47
- [PowerPC][NFC] Rename/organize encoding test files for ISA3.1 · 31632692
  Lei Huang authored Jun 30, 2020
  31632692
- [ARM] Allow the fabs intrinsic to be tail predicated · 3324e3a6
  Samuel Tebbs authored Jun 30, 2020
  3324e3a6
- Pass MDFieldPrinter::printAPInt APInt arg by reference not value. · 32f8cd9a
  Simon Pilgrim authored Jun 30, 2020
  32f8cd9a
- [ARM] Allow the usub_sat and ssub_sat intrinsics to be tail predicated · 66fa3139
  Samuel Tebbs authored Jun 30, 2020
  66fa3139
- RegAlloc: Start using Register · b7f6ecf0
  Matt Arsenault authored Jun 30, 2020
  
  b7f6ecf0
- BranchFolding: Use Register · af1eeaf3
  Matt Arsenault authored Jun 30, 2020
  
  af1eeaf3
- TailDuplicator: Use Register · edb4a5cb
  Matt Arsenault authored Jun 30, 2020
  
  edb4a5cb