Commits · f99f9881e331ea075f49b42f4bf57f1bc93f24dc · Roger Ferrer / llvm-epi · GitLab

Aug 01, 2019
- [X86] EltsFromConsecutiveLoads - don't attempt to merge volatile loads (PR42846) · f99f9881
  Simon Pilgrim authored Aug 01, 2019
  f99f9881
- [RISCV] Add Custom Parser for Atomic Memory Operands · f596f450
  Sam Elliott authored Aug 01, 2019
  f596f450
- [IR] Value: add replaceUsesWithIf() utility · 081e990d
  Roman Lebedev authored Aug 01, 2019
  081e990d
- [ARM] Fix for MVE VREV64 · 1343814f
  David Green authored Aug 01, 2019
  1343814f
- [AArch64] Do not allocate unnecessary emergency slot. · 7ebccfef
  Sander de Smalen authored Aug 01, 2019
  7ebccfef
- [MIPS GlobalISel] Fold load/store + G_GEP + G_CONSTANT · 8a40cedf
  Petar Avramovic authored Aug 01, 2019
  8a40cedf
- [NFC][ARM][ParallelDSP] Getters and renaming · 7ca8c6f6
  Sam Parker authored Aug 01, 2019
  7ca8c6f6
- AMDGPU/SILoadStoreOptimizer: Make some functions const · 7a2958bc
  Tom Stellard authored Aug 01, 2019
  7a2958bc
- recommit:[PowerPC] Eliminate loads/swap feeding swap/store for vector type by... · 66c32090
  Zi Xuan Wu authored Aug 01, 2019
  66c32090
- AMDGPU/GlobalISel: Fix flat load/store of pointer types · 9952f464
  Matt Arsenault authored Aug 01, 2019
  9952f464
- AMDGPU/GlobalISel: Remove manual store select code · 57495268
  Matt Arsenault authored Aug 01, 2019
  57495268
- AMDGPU/GlobalISel: Select local atomic cmpxchg · ae87b9f2
  Matt Arsenault authored Aug 01, 2019
  ae87b9f2
- AMDGPU/GlobalISel: Handle G_ATOMICRMW_FADD · 26cb53b2
  Matt Arsenault authored Aug 01, 2019
  26cb53b2
- AMDGPU/GlobalISel: Allow selection of DS atomicrmw · da5b9bfa
  Matt Arsenault authored Aug 01, 2019
  da5b9bfa
- AMDGPU: Start redefining atomic PatFrags · e6ce4842
  Matt Arsenault authored Aug 01, 2019
  e6ce4842
- AMDGPU: Correct FP atomic patterns · 70e20c0f
  Matt Arsenault authored Aug 01, 2019
  70e20c0f
- AMDGPU/GlobalISel: Select simple local stores · 3baf4d34
  Matt Arsenault authored Aug 01, 2019
  3baf4d34
- GlobalISel: moreElementsVector for G_LOAD/G_STORE · 7bedceb5
  Matt Arsenault authored Aug 01, 2019
  7bedceb5
- Reapply "AMDGPU: Split block for si_end_cf" · d48324ff
  Matt Arsenault authored Aug 01, 2019
  d48324ff
- AMDGPU/GlobalISel: Select local loads · 3594011d
  Matt Arsenault authored Aug 01, 2019
  3594011d
- Revert "[MS] Emit S_HEAPALLOCSITE debug info in Selection DAG" and · 153f2005
  Amy Huang authored Jul 31, 2019
  153f2005
- [ARM] Lower "(x<<c) > 0x80000000U" to "lsls" on Thumb1. · 89b80f12
  Eli Friedman authored Jul 31, 2019
  89b80f12
- [ARM] Transform compare of masked value to shift on Thumb1. · 2f45ec1c
  Eli Friedman authored Jul 31, 2019
  2f45ec1c
- [X86] Add DAG combine to fold any_extend_vector_inreg+truncstore to an extractelement+store · b51dc640
  Craig Topper authored Jul 31, 2019
  b51dc640
Jul 31, 2019
- [GISel] Address review feedback on passing MD_callees to lowerCall. · 641ea2e7
  Mark Lacey authored Jul 31, 2019
  641ea2e7
- [GISel] Pass MD_callees metadata down in call lowering. · 7b8d3eb9
  Mark Lacey authored Jul 31, 2019
  7b8d3eb9
- AArch64: Add a tagged-globals backend feature. · 09f39967
  Peter Collingbourne authored Jul 31, 2019
  09f39967
- SelectionDAG, MI, AArch64: Widen target flags fields/arguments from unsigned char to unsigned. · 33773d5c
  Peter Collingbourne authored Jul 31, 2019
  33773d5c
- Reland "[DwarfDebug] Dump call site debug info" · b9973f87
  Djordje Todorovic authored Jul 31, 2019
  b9973f87
- [X86] Moved IsNOT helper earlier. NFCI. · 0707f66a
  Simon Pilgrim authored Jul 31, 2019
  0707f66a
- [ARM] Reject CSEL instructions with invalid operands · 806231ec
  Mikhail Maltsev authored Jul 31, 2019
  806231ec
- [X86][AVX] Ensure chained subvector insertions are the same size (PR42833) · 24ad2b5e
  Simon Pilgrim authored Jul 31, 2019
  24ad2b5e
- [AArch64] Add support for Transactional Memory Extension (TME) · a36d3147
  Momchil Velikov authored Jul 31, 2019
  a36d3147
- [ARM] Generate MVE VFMAs · 09a1b817
  Oliver Cruickshank authored Jul 31, 2019
  09a1b817
- [NFC] Test Commit · e7241e85
  Oliver Cruickshank authored Jul 31, 2019
  e7241e85
- [RISCV] Support 'f' Inline Assembly Constraint · 9e6b2e16
  Sam Elliott authored Jul 31, 2019
  9e6b2e16
- [NFC][ARMCGP] Use switch in isSupportedValue · 5ea07f7c
  Sam Parker authored Jul 31, 2019
  5ea07f7c
- [AArch64][SVE2] Load/store instruction fixes · 1518c88a
  Cullen Rhodes authored Jul 31, 2019
  1518c88a
- [RISCV] Add support for lowering floating point inlineasm clobbers · 8d7ec4d6
  Simon Cook authored Jul 31, 2019
  8d7ec4d6
- [AArch64][SVE2] Minor refactoring and cleanup · 17230e02
  Cullen Rhodes authored Jul 31, 2019
  17230e02