Commits · fa00ba3c1a43b52779d9d23fd9baef57601f6ea1 · Roger Ferrer / llvm-epi · GitLab

Aug 08, 2016
- [AArch64] PR28877: Don't assume we're running after legalization when creating vcvtfp2fxs · fa00ba3c
  Silviu Baranga authored Aug 08, 2016
  fa00ba3c
Aug 07, 2016
- [AVX-512] Improve lowering of inserting a single element into lowest element... · f4442312
  Craig Topper authored Aug 07, 2016
  f4442312
- Revert r277905, it caused PR28894 · 99ceee8a
  Nico Weber authored Aug 07, 2016
  99ceee8a
- [AVX-512] Add 512-bit logical operations to load folding tables. Add avx512f... · 2c51c74d
  Craig Topper authored Aug 07, 2016
  2c51c74d
- [AVX-512] Add EVEX encoded floating point MAX/MIN instructions to the load folding tables. · 938e7ab9
  Craig Topper authored Aug 07, 2016
  938e7ab9
- AVX-512: Changed lowering of BITCAST between i1 vectors and i8/i16/i32 integer values · dca03beb
  Elena Demikhovsky authored Aug 07, 2016
  dca03beb
- [X86][AVX512BW] Add sext/zext AVX512BW 512-bit vector tests · 69f2299e
  Simon Pilgrim authored Aug 07, 2016
  69f2299e
- [X86][AVX512] Add sext/zext to 512-bit vector tests · a23141ec
  Simon Pilgrim authored Aug 07, 2016
  a23141ec
- AVX-512: Added a test for cmp intrinsics · 2fabdcc6
  Elena Demikhovsky authored Aug 07, 2016
  2fabdcc6
- [X86] Add commutable floating point max/min instructions to the load folding tables. · 49841c38
  Craig Topper authored Aug 07, 2016
  49841c38
- [AVX-512] Add andnps/andnpd to the avx512vl stack folding test. · 2c1f6706
  Craig Topper authored Aug 07, 2016
  2c1f6706
Aug 06, 2016
- [X86][AVX2] Improve sign/zero extension on AVX2 targets · bc573ca1
  Simon Pilgrim authored Aug 06, 2016
  bc573ca1
- [AVX-512] Add AVX-512 scalar CVT instructions to hasUndefRegUpdate. · 19505bc3
  Craig Topper authored Aug 06, 2016
  19505bc3
- [AVX-512] Add AVX512 run line to a test and re-generate the checks. Future... · b0476fcc
  Craig Topper authored Aug 06, 2016
  b0476fcc
- [X86][SSE] Enable commutation between MOVHLPS and UNPCKHPD · 7d168e19
  Simon Pilgrim authored Aug 06, 2016
  7d168e19
- [X86][SSE] Regenerate SSE1 shuffle tests · ef10e922
  Simon Pilgrim authored Aug 06, 2016
  ef10e922
- CodeGen: If Convert blocks that would form a diamond when tail-merged. · 71cb44d9
  Kyle Butt authored Aug 06, 2016
  71cb44d9
Aug 05, 2016
- PowerPC: Add a triple to this test · 6863027f
  Justin Bogner authored Aug 05, 2016
  6863027f
- AMDGPU/SI: Increase SGPR limit to 96 on Tonga/Iceland · 355a8642
  Marek Olsak authored Aug 05, 2016
  355a8642
- [ARM] Constant Materialize: imms with specific value can be encoded into mov.w · f68a6a72
  Weiming Zhao authored Aug 05, 2016
  f68a6a72
- GlobalISel: clear pending phis after MachineFunction translated · 14e7f73a
  Tim Northover authored Aug 05, 2016
  14e7f73a
- [X86][SSE] Add initial support for 2 input target shuffle combining. · 69b6a708
  Simon Pilgrim authored Aug 05, 2016
  69b6a708
- GlobalISel: IRTranslate PHI instructions · 97d0cb31
  Tim Northover authored Aug 05, 2016
  97d0cb31
- [PowerPC] Wrong fast-isel codegen for VSX floating-point loads · c3b495a6
  Ulrich Weigand authored Aug 05, 2016
  c3b495a6
- · 30e0ce8e
  Strahinja Petrovic authored Aug 05, 2016
  30e0ce8e
Aug 04, 2016
- GlobalISel: extend add widening to SUB, MUL, OR, AND and XOR. · 61c16142
  Tim Northover authored Aug 04, 2016
  61c16142
- GlobalISel: add support for G_MUL · 1cfa919b
  Tim Northover authored Aug 04, 2016
  1cfa919b
- GlobalISel: implement narrowing for G_ADD. · 9656f147
  Tim Northover authored Aug 04, 2016
  9656f147
- [OpenCL] Add missing tests for getOCLTypeName · 86c05223
  Yaxun Liu authored Aug 04, 2016
  86c05223
- AArch64: don't assume all i128s are BUILD_PAIRs · 2f32e7f0
  Tim Northover authored Aug 04, 2016
  2f32e7f0
- GlobalISel: also add G_TRUNC to IRTranslator. · 06db18fb
  Tim Northover authored Aug 04, 2016
  06db18fb
- GlobalISel: add code to widen scalar G_ADD · 32335818
  Tim Northover authored Aug 04, 2016
  32335818
- [WebAssembly] Check return value of getRegForValue in FastISel · 732636d9
  Derek Schuff authored Aug 04, 2016
  732636d9
- [Hexagon] Validate register class when doing bit simplification · 04c0796e
  Krzysztof Parzyszek authored Aug 04, 2016
  04c0796e
- [mips] Set Personality and LSDA encoding for FreeBSD · 5dcbac57
  Daniel Sanders authored Aug 04, 2016
  5dcbac57
- [Hexagon] Clear kill flags from modified registers in peephole optimizer · 7773c584
  Krzysztof Parzyszek authored Aug 04, 2016
  7773c584
- [X86] Heuristic to selectively build Newton-Raphson SQRT estimation · f679530b
  Nikolai Bozhenov authored Aug 04, 2016
  f679530b
- [X86][SSE] Don't decide when to scalarize CTTZ/CTLZ for performance at... · 8ae6dad4
  Simon Pilgrim authored Aug 04, 2016
  8ae6dad4
- [mips] Enable tail calls by default · 57f4ae46
  Simon Dardis authored Aug 04, 2016
  57f4ae46
- [XRay] Align entry and return sleds to 2 byte boundaries · 7e9abea2
  Dean Michael Berris authored Aug 04, 2016
  7e9abea2