Commits · fa6607d0b6fe5dd45257491d83ffdd5d0f66a3bc · Roger Ferrer / llvm-epi · GitLab

Feb 11, 2015
- [mips] Merge disassemblers into a single implementation. · a19216c8
  Daniel Sanders authored Feb 11, 2015
  a19216c8
- [X86] Split information collection from actual transformation in call frame optimization · 1921d3d6
  Michael Kuperstein authored Feb 11, 2015
  1921d3d6
- [PBQP] Cautiously update edge costs in the solver · de79026d
  Arnaud A. de Grandmaison authored Feb 11, 2015
  de79026d
- Use ADDITIONAL_HEADER_DIRS in all LLVM CMake projects. · 3bd47cee
  Zachary Turner authored Feb 11, 2015
  3bd47cee
- R600/SI: Store immediate offsets > 12-bits in soffset · 94b72317
  Tom Stellard authored Feb 11, 2015
  94b72317
- R600/SI: Add soffset operand to mubuf addr64 instruction · c53861ab
  Tom Stellard authored Feb 11, 2015
  c53861ab
Feb 10, 2015
- X86: @llvm.frameaddress should defer to SelectionDAG for Win CFI · ca19485f
  David Majnemer authored Feb 10, 2015
  ca19485f
- X86: Make @llvm.frameaddress work correctly with Windows unwind codes · 13d0b11d
  David Majnemer authored Feb 10, 2015
  13d0b11d
- Fix up r228725, missed change in PPCSubtarget definition · 67f36bd0
  Bill Schmidt authored Feb 10, 2015
  67f36bd0
- [PowerPC] Fix reverted patch r227976 to avoid register assignment issues · 82f1c775
  Bill Schmidt authored Feb 10, 2015
  82f1c775
- X86: Emit Win64 SaveXMM opcodes at the right offset in the right order · a7d908eb
  David Majnemer authored Feb 10, 2015
  a7d908eb
- [PowerPC] Support the (old) cntlz instruction alias · 57c6ac5e
  Hal Finkel authored Feb 10, 2015
  57c6ac5e
- [Hexagon] Adding vector load with post-increment instructions. Adding decoder... · 404d5b24
  Colin LeMahieu authored Feb 10, 2015
  404d5b24
- [mips][microMIPS] Implement movep instruction · 41688679
  Zoran Jovanovic authored Feb 10, 2015
  41688679
- [X86][AVX2] Missing AVX2 memory folding instructions · d142ab7d
  Simon Pilgrim authored Feb 10, 2015
  d142ab7d
- [X86][XOP] Added XOP memory folding patterns + tests · cd32254a
  Simon Pilgrim authored Feb 10, 2015
  cd32254a
- [mips][microMIPS] Fix disassembling of 16-bit microMIPS instructions LWM16 and SWM16 · d68d424a
  Jozef Kolek authored Feb 10, 2015
  d68d424a
- [X86][FastIsel] Avoid introducing legacy SSE instructions if the target has AVX. · 62622d23
  Andrea Di Biagio authored Feb 10, 2015
  62622d23
- [X86] Preserve mem refs on newly created 'Store' node instead of 'Load' node... · 9e71b82f
  Craig Topper authored Feb 10, 2015
  9e71b82f
- [X86] Remove unnecessary alignment checks from the load folding tables. · f7e92f10
  Craig Topper authored Feb 10, 2015
  f7e92f10
- X86: Emit an ABI compliant prologue and epilogue for Win64 · 93c22a45
  David Majnemer authored Feb 10, 2015
  93c22a45
- Migrate PPCAsmPrinter's subtarget from reference to pointer in · d4986808
  Eric Christopher authored Feb 10, 2015
  d4986808
- Fix the clang -Werror build (-Wunused-variable) · 36a03690
  David Blaikie authored Feb 10, 2015
  36a03690
- [Hexagon] Adding missing load instructions and removing an unused multiclass parameter. · 328b1633
  Colin LeMahieu authored Feb 09, 2015
  328b1633
- [Hexagon] Factoring classes out of some load patterns and deleting some unused ones. · 4282e7cf
  Colin LeMahieu authored Feb 09, 2015
  4282e7cf
Feb 09, 2015
- [Hexagon] Removing more V4 predicates since V4 is the required minimum. · 4fd203d3
  Colin LeMahieu authored Feb 09, 2015
  4fd203d3
- [Hexagon] Removing v2-4 flags. V4 is the minimum supported version. · 641c24b9
  Colin LeMahieu authored Feb 09, 2015
  641c24b9
- [Hexagon] Factoring classes out of store patterns. · 955c4ff9
  Colin LeMahieu authored Feb 09, 2015
  955c4ff9
- [Hexagon] Formatting v5 TD file. Removing commented defs. · ab5a8d60
  Colin LeMahieu authored Feb 09, 2015
  ab5a8d60
- [Hexagon] Cleaning up definition formatting. · 38e66892
  Colin LeMahieu authored Feb 09, 2015
  38e66892
- This change implements the following three logical vector operations: · 0b0cdb1c
  Kit Barton authored Feb 09, 2015
  0b0cdb1c
- rename variable to give it some meaning; remove obvious comments; NFC · a7b893d5
  Sanjay Patel authored Feb 09, 2015
  a7b893d5
- fix comment that didn't match the code; remove unnecessary braces; NFC · fc54c61c
  Sanjay Patel authored Feb 09, 2015
  fc54c61c
- [X86] Remove 256-bit and 512-bit memop pattern fragments. They are no longer used. · 141e65e6
  Craig Topper authored Feb 09, 2015
  141e65e6
- [X86] Remove 'memop' uses from AVX512. Use 'load' instead. · 820d4927
  Craig Topper authored Feb 09, 2015
  820d4927
Feb 08, 2015
- [X86] Remove the remaining uses of memop from AVX and AVX2 instruction... · 68ab0465
  Craig Topper authored Feb 08, 2015
  68ab0465
- fix typos; NFC · 3510bc71
  Sanjay Patel authored Feb 08, 2015
  3510bc71
- Moved AVX2 vbroadcast (reg) instruction foldings under the correct grouping. NFC. · d11b0136
  Simon Pilgrim authored Feb 08, 2015
  d11b0136
- ARM & AArch64: teach LowerVSETCC that output type size may differ from input. · 45aa89c9
  Tim Northover authored Feb 08, 2015
  45aa89c9
- [X86] Add register use/def for wrmsr and rdmsr. · e169c571
  Craig Topper authored Feb 07, 2015
  e169c571