Commits · fac9941e57013127593a47e02e7e88f56c9be2a4 · Roger Ferrer / llvm-epi · GitLab

Jan 23, 2020
- AMDGPU: Fix ubsan error · fac9941e
  Matt Arsenault authored Jan 23, 2020
  fac9941e
- AMDGPU/GlobalISel: Select V_ADD3_U32/V_XOR3_B32 · 618fa77a
  Matt Arsenault authored Jan 21, 2020
  618fa77a
- [Alignment][NFC] Use Align with CreateAlignedStore · 59f95222
  Guillaume Chatelet authored Jan 23, 2020
  59f95222
- AMDGPU: Check for other uses when looking through casted select · dfec7022
  Matt Arsenault authored Jan 23, 2020
  dfec7022
- [Alignement][NFC] Deprecate untyped CreateAlignedLoad · 279fa8e0
  Guillaume Chatelet authored Jan 23, 2020
  279fa8e0
- AMDGPU/GlobalISel: Remove redundant or patterns · 4d14772f
  Matt Arsenault authored Jan 22, 2020
  4d14772f
Jan 22, 2020
- AMDGPU/R600: Emit rodata in text segment · 1b8eab17
  Jan Vesely authored Jan 19, 2020
  1b8eab17
- Revert "[DA][TTI][AMDGPU] Add option to select GPUDA with TTI" · cd470717
  Nico Weber authored Jan 22, 2020
  cd470717
- AMDGPU/GlobalISel: Handle 16-bank LDS llvm.amdgcn.interp.p1.f16 · 1192d7b2
  Matt Arsenault authored Jan 12, 2020
  1192d7b2
- AMDGPU/GlobalISel: Select llvm.amdgcn.mov.dpp · c05f23e4
  Matt Arsenault authored Jan 17, 2020
  c05f23e4
- AMDGPU/GlobalISel: Select llvm.amdgcn.mov.dpp8 · dd09ec12
  Matt Arsenault authored Jan 17, 2020
  
  dd09ec12
- AMDGPU: Fix element size assertion · 0bf434cc
  Matt Arsenault authored Jan 22, 2020
  0bf434cc
- AMDGPU/GlobalISel: Keep G_BITCAST out of waterfall loop · bb562d1a
  Matt Arsenault authored Jan 04, 2020
  bb562d1a
- AMDGPU/GlobalISel: Fold add of constant into G_INSERT_VECTOR_ELT · 52ec7379
  Matt Arsenault authored Jan 03, 2020
  52ec7379
- AMDGPU/GlobalISel: Select G_INSERT_VECTOR_ELT · d1dbb5e4
  Matt Arsenault authored Jan 03, 2020
  
  d1dbb5e4
- AMDGPU/GlobalISel: Fix RegBankSelect for G_INSERT_VECTOR_ELT · 3524d441
  Matt Arsenault authored Jan 03, 2020
  3524d441
- AMDGPU/GlobalISel: Fold constant offset vector extract indexes · e3d352c5
  Matt Arsenault authored Jan 03, 2020
  e3d352c5
- AMDGPU: Fix typo · e93e1b62
  Matt Arsenault authored Jan 22, 2020
  
  e93e1b62
- AMDGPU: Look through casted selects to constant fold bin ops · 2fe500ab
  Matt Arsenault authored Jan 20, 2020
  2fe500ab
- AMDGPU: Do binop of select of constant fold in AMDGPUCodeGenPrepare · bcd91778
  Matt Arsenault authored Jan 19, 2020
  bcd91778
- AMDGPU/GlobalISel: Add pre-legalize combiner pass · a174f0da
  Matt Arsenault authored Jan 05, 2020
  a174f0da
- [MachineScheduler] Allow clustering mem ops with complex addresses · e0f0d0e5
  Jay Foad authored Jan 06, 2020
  e0f0d0e5
- AMDGPU/GlobalISel: Fix RegbankSelect for llvm.amdgcn.fmul.legacy · 70096ca1
  Matt Arsenault authored Jan 21, 2020
  
  70096ca1
- AMDGPU/GlobalISel: Handle atomic_inc/atomic_dec · a722cbf7
  Matt Arsenault authored Jan 17, 2020
  a722cbf7
- AMDGPU: Fix interaction of tfe and d16 · 9c928649
  Matt Arsenault authored Jan 17, 2020
  9c928649
- AMDGPU/GlobalISel: RegBankSelect interp intrinsics · b94d3b9b
  Matt Arsenault authored Jul 16, 2019
  b94d3b9b
- AMDGPU: Fix missing immarg on llvm.amdgcn.interp.mov · 64e95282
  Matt Arsenault authored Jan 12, 2020
  64e95282
- [DA][TTI][AMDGPU] Add option to select GPUDA with TTI · a90a6502
  Austin Kerbow authored Jan 20, 2020
  a90a6502
- [AMDGPU] SIRemoveShortExecBranches should not remove branches exiting loops · 6b4b3e28
  Carl Ritson authored Jan 22, 2020
  6b4b3e28
- Resubmit: [AMDGPU] Invert the handling of skip insertion. · e53a9d96
  cdevadas authored Jan 22, 2020
  e53a9d96
- [AArch64] Don't generate gpr CSEL instructions in early-ifcvt if regclasses aren't compatible. · 67a87753
  Amara Emerson authored Jan 17, 2020
  67a87753
Jan 21, 2020
- AMDGPU/GlobalISel: Merge trivial legalize rules · e47965bf
  Matt Arsenault authored Jan 21, 2020
  e47965bf
- AMDGPU/GlobalISel: Merge G_PTR_ADD/G_PTR_MASK rules · 9a5a6e94
  Matt Arsenault authored Jan 21, 2020
  
  9a5a6e94
- AMDGPU/GlobalISel: Legalize G_PTR_ADD for arbitrary pointers · fd109308
  Matt Arsenault authored Jan 21, 2020
  fd109308
- Update spelling of {analyze,insert,remove}Branch in strings and comments · 020041d9
  Krzysztof Parzyszek authored Jan 21, 2020
  020041d9
- Revert "[AMDGPU] Invert the handling of skip insertion." · a80291ce
  Nicolai Hähnle authored Jan 21, 2020
  a80291ce
- [AMDGPU] Fix -Wunused-variable after e5823bf8 · 5721483b
  Fangrui Song authored Jan 20, 2020
  
  5721483b
- AMDDGPU/GlobalISel: Fix RegBankSelect for llvm.amdgcn.ps.live · c72aa27f
  Matt Arsenault authored Jan 20, 2020
  
  c72aa27f
- AMDGPU: Don't create weird sized integers · e5823bf8
  Matt Arsenault authored Jan 18, 2020
  e5823bf8
Jan 20, 2020
- AMDGPU: Prepare to use scalar register indexing · 9b13b4a0
  Matt Arsenault authored Jan 03, 2020
  9b13b4a0