Commits · fc690777fce0bf50a8f424b05993b1e218713ae5 · Roger Ferrer / llvm-epi · GitLab

May 06, 2021
- Revert "[ARM] Transforming memcpy to Tail predicated Loop" · fc690777
  Malhar Jajoo authored May 06, 2021
  fc690777
- [AMDGPU] Regenerate fp2int tests. NFCI. · 0fdce16e
  Simon Pilgrim authored May 06, 2021
  
  0fdce16e
- [AMDGPU] Regenerate shift tests. NFCI. · 20e976e2
  Simon Pilgrim authored May 06, 2021
  
  20e976e2
- [SystemZ] Support builtin_frame_address with packed stack without backchain. · a0da66bc
  Jonas Paulsson authored May 02, 2021
  a0da66bc
- [AMDGPU] SIFoldOperands: clean up tryConstantFoldOp · 7c706af0
  Jay Foad authored Apr 07, 2021
  7c706af0
- [ARM] Transforming memcpy to Tail predicated Loop · b856f4a2
  Malhar Jajoo authored May 06, 2021
  b856f4a2
- [SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach... · 6c80361b
  Jessica Clarke authored May 06, 2021
  6c80361b
- [BPF][Test] Disable codegen test on AIX · 6bdfcb16
  Jinsong Ji authored May 06, 2021
  6bdfcb16
- [AMDGPU] Switch AnnotateUniformValues to MemorySSA · ab90ae6f
  Stanislav Mekhanoshin authored May 05, 2021
  ab90ae6f
- [AMDGPU] Move insertion of function entry waitcnt later · 6617a5a5
  Austin Kerbow authored Apr 27, 2021
  6617a5a5
- [AMDGPU] Revise handling of preexisting waitcnt · f5199d7a
  Austin Kerbow authored Apr 09, 2021
  f5199d7a
- [ARM] Simplification to ARMBlockPlacement Pass. · 9ba5238c
  Malhar Jajoo authored May 05, 2021
  9ba5238c
- [M68k][AsmParser] Fix invalid register name parsing logics · 5b3dd2a4
  Min Hsu authored May 02, 2021
  5b3dd2a4
- [M68k][AsmParser] Support negative integer constants · abac6023
  Min Hsu authored May 02, 2021
  abac6023
- [M68k][test] Initial migration of MC tests · 34da083a
  Min Hsu authored Apr 27, 2021
  34da083a
- [MCAsmInfo] Support UsesCFIForDebug for targets with no exception handling · 41f8b8e8
  RamNalamothu authored May 06, 2021
  41f8b8e8
- AMDGPU: Fix lit test · b6d244e5
  Matt Arsenault authored May 05, 2021
  
  b6d244e5
- [AMDGPU][GlobalISel] Widen 1 and 2 byte scalar loads · 7a41639c
  Vang Thao authored Apr 13, 2021
  7a41639c
May 05, 2021
- AMDGPU: Add a few more tail call tests · ef5f0ade
  Matt Arsenault authored Mar 14, 2021
  ef5f0ade
- [AMDGPU] Improve global SADDR selection · 909a5ccf
  Stanislav Mekhanoshin authored May 03, 2021
  909a5ccf
- X86/GlobalISel: Use generic version of splitToValueTypes · 23ae35e8
  Matt Arsenault authored Feb 28, 2021
  23ae35e8
- GlobalISel: Use DAG call lowering infrastructure in a more compatible way · fa0b93b5
  Matt Arsenault authored Apr 13, 2021
  fa0b93b5
- [MachineCSE][NFC]: Refactor and comment on preventing CSE for isConvergent instrs · a11489ae
  Michael Kitzan authored Apr 30, 2021
  a11489ae
- [NFC][X86][Codegen] Add some tests for 64-bit shift by (32-x) · 40147c33
  Roman Lebedev authored May 05, 2021
  
  40147c33
- [WebAssembly] Set alignment to 1 for SIMD memory intrinsics · 89333b35
  Thomas Lively authored May 05, 2021
  89333b35
- [AMDGPU] Pre-commit 2 new saddr load tests. NFC. · 4c178d80
  Stanislav Mekhanoshin authored May 05, 2021
  
  4c178d80
- Revert "[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach... · 897d7bce
  Jessica Clarke authored May 05, 2021
  897d7bce
- [SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach... · 6e876f9d
  Jessica Clarke authored May 05, 2021
  6e876f9d
- [MIPS][MSA] Regenerate immediates tests. NFCI. · 0f97afe3
  Simon Pilgrim authored May 05, 2021
  0f97afe3
- [MIPS][MSA] Regenerate i5-b tests. NFCI. · 679e30dc
  Simon Pilgrim authored May 05, 2021
  679e30dc
- [MIPS][MSA] Regenerate bitwise tests. NFCI. · c673a95c
  Simon Pilgrim authored May 05, 2021
  c673a95c
- [AMDGPU] Fix llc pipeline lit test for bots enabling expensive checks · 83646f60
  Baptiste Saleil authored May 05, 2021
  
  83646f60
- [AArch64] Fix for the pre-indexed paired load/store optimization. · 3f4bad5e
  Stelios Ioannou authored May 05, 2021
  3f4bad5e
- [AArch64] Fix scalar imm variants of SIMD shift left instructions · 1ee50b47
  Andrew Savonichev authored Apr 29, 2021
  1ee50b47
- [X86][SSE] Move unpack(hop,hop) fold from foldShuffleOfHorizOp to combineTargetShuffle · 85460a2f
  Simon Pilgrim authored May 05, 2021
  85460a2f
- [RISCV][VP][NFC] Add tests for VP_SREM and VP_UREM · 61a46375
  Fraser Cormack authored May 05, 2021
  61a46375
- [AMDGPU] Autogenerate checks for a clustering test and add GFX10 · f106fe5f
  Jay Foad authored May 05, 2021
  
  f106fe5f
- [RISCV][VP][NFC] Add tests for VP_MUL and VP_[US]DIV · 437468f3
  Fraser Cormack authored May 05, 2021
  437468f3
- [X86]Fix a crash trying to convert indices to proper type. · 13a51e01
  Alexey Bataev authored May 04, 2021
  13a51e01
- [RISCV][VP][NFC] Add tests for VP_SHL and VP_LSHR · 491a3d13
  Fraser Cormack authored May 05, 2021
  491a3d13