Commits · fc986e38d24f80c0a8525512945fe8d35b657674 · Roger Ferrer / llvm-epi · GitLab

Nov 24, 2022
- [SCEV] Rename max backedge-taken count -> constant max backedge taken-count in printout · 211d9411
  Max Kazantsev authored Nov 24, 2022
  211d9411
- [AMDGPU][AsmParser] Refine parsing instruction operands. · fce7a7aa
  Ivan Kosarev authored Nov 24, 2022
  fce7a7aa
- [AMDGPU][CodeGen] Support raw format TFE buffer loads other than byte, short and d16 ones. · ec8ede81
  Ivan Kosarev authored Nov 17, 2022
  ec8ede81
- [X86] combine-and.ll - add AVX2/AVX512 test coverage · 6f11c395
  Simon Pilgrim authored Nov 24, 2022
  
  6f11c395
- [Debugify] Strip llvm.mir.debugify metadata · 9ee8d2e0
  Anton Sidorenko authored Nov 21, 2022
  9ee8d2e0
- [Debugify] Add precommit test for D138417 · 78219640
  Anton Sidorenko authored Nov 21, 2022
  78219640
- [CodeGen] Use poison instead of undef as placeholder in AtomicExpandPass [NFC] · f408635b
  Manuel Brito authored Nov 24, 2022
  f408635b
- [RISCV] Lower unmasked zero-stride vector load to (scalar load + splat) · 241accea
  Pengcheng Wang authored Nov 24, 2022
  241accea
- [RISCV] Precommit test for D138101 · 25b51b79
  Pengcheng Wang authored Nov 24, 2022
  25b51b79
- [LoongArch] Diagnose the behavior of reading and writing registers that do not... · eca62f92
  gonglingqin authored Nov 24, 2022
  eca62f92
- [InstSimplify] Add precommit test for D138542; NFC · 79fd94e9
  chenglin.bi authored Nov 24, 2022
  
  79fd94e9
Nov 23, 2022
- [BasicAA] Add tests with __memcpy_chk. · 4b4cbbd7
  Florian Hahn authored Nov 23, 2022
  
  4b4cbbd7
- Add MC support of RISCV Zcd Extension · 0dbc52a0
  WuXinlong authored Nov 23, 2022
  0dbc52a0
- [Hexagon] Fix deinterleaving after vmpyh · f8cb97a0
  Krzysztof Parzyszek authored Nov 23, 2022
  
  f8cb97a0
- [Hexagon] Fix order of operands in V6_vmpyhus · ae9356e8
  Krzysztof Parzyszek authored Nov 23, 2022
  ae9356e8
- [PowerPC] Exploit xxperm, check for dead vectors and substitute vperm with xxperm · 934d5fa2
  Maryam Moghadas authored Sep 12, 2022
  934d5fa2
- [WebAssembly] Remove unnecessary GEP insts from table tests · bab98395
  Paulo Matos authored Nov 22, 2022
  bab98395
- [AArch64][SME]: Generate streaming-compatible code for int-minmax, fp-minmax · 10eda33a
  Hassnaa Hamdi authored Nov 23, 2022
  10eda33a
- [AArch64][SME]: Add precursory tests for D138292 · a5ee6e08
  Hassnaa Hamdi authored Nov 18, 2022
  a5ee6e08
- [SystemZ] Extend combineGET_CCMASK() to handle a truncated SELECT_CCMASK. · ca515294
  Jonas Paulsson authored Nov 18, 2022
  ca515294
- Utils: Fix deleting calls to null in non-0 address spaces · cb0d2887
  Matt Arsenault authored Nov 22, 2022
  
  cb0d2887
- [VectorCombine] Enable scalarizeBinopOrCmp for scalable vectors · ee4d6c8b
  Matt Devereau authored Nov 23, 2022
  ee4d6c8b
- Revert "[SROA] `isVectorPromotionViable()`: memory intrinsics operate on vectors of bytes" · 5cfc22ca
  Benjamin Kramer authored Nov 23, 2022
  5cfc22ca
- [AArch64] Optimize cmp chain before legalization · 3651bc83
  zhongyunde authored Nov 23, 2022
  3651bc83
- [CostModel][X86] Fix permute latency cost · 1215e86a
  Haohai Wen authored Nov 23, 2022
  1215e86a
- [SelectionDAG] Remove deprecated MemSDNode->getAlignment() · 88218d5c
  Alex Richardson authored Nov 21, 2022
  88218d5c
- Add MC support of RISCV Zcf Extension · 16bf359a
  WuXinlong authored Nov 22, 2022
  16bf359a
- [MachO][ObjCopy] Handle exports trie in LC_DYLD_INFO and LC_DYLD_EXPORTS_TRIE · 652713e2
  Daniel Rodríguez Troitiño authored Nov 22, 2022
  652713e2
- GlobalIFunc: Make ifunc respect function address spaces · 0d527e56
  Matt Arsenault authored Nov 22, 2022
  
  0d527e56
- InstCombine: Fold some identities for canonicalize · 64639619
  Matt Arsenault authored Nov 11, 2022
  64639619
- InstCombine: Add baseline tests for canonicalize identities · 9ba3b61c
  Matt Arsenault authored Nov 11, 2022
  
  9ba3b61c
- [CostModel][X86] Add CostKinds test coverage for shufflevector instruction · 2dfe76e9
  Haohai Wen authored Nov 23, 2022
  2dfe76e9
- [AMDGPU][InsertWaits] No wait for WAW for global/scratch_load · 0eaf6759
  Ruiling Song authored Nov 21, 2022
  0eaf6759
- [MachO] Support exports trie in both LC_DYLD_INFO and LC_DYLD_EXPORTS_TRIE · 42ad9bf9
  Daniel Rodríguez Troitiño authored Nov 22, 2022
  42ad9bf9
- [X86] Use lock add/sub/or/and/xor for cases that we only care about the EFLAGS (negated cases) · 7218103b
  Phoebe Wang authored Nov 23, 2022
  7218103b
- [AVR] Fix wrong ABI of AVRTiny. · f452b9dc
  Ben Shi authored Nov 17, 2022
  f452b9dc
- [DAGCombiner] fold or (xor x, y),? patterns · cdb7b804
  chenglin.bi authored Nov 23, 2022
  cdb7b804
- [asan] Don't demangle __odr_asan_gen_* symbols · 297a1830
  Fangrui Song authored Nov 22, 2022
  297a1830
- Revert D138095 Use InernalAlloc in DemangleCXXABI · 06c74b5e
  Fangrui Song authored Nov 22, 2022
  06c74b5e
- [SROA] `isVectorPromotionViable()`: avoid allowing overly large vectors · 655d8573
  Roman Lebedev authored Nov 23, 2022
  655d8573