Commits · fdc902774e7ae0dae0833216500da047c7c4bec6 · Roger Ferrer / llvm-epi · GitLab

Jul 29, 2020
- [DAG][AMDGPU][X86] Add SimplifyMultipleUseDemandedBits handling for... · fdc90277
  Simon Pilgrim authored Jul 29, 2020
  fdc90277
- [SimplifyCFG][LoopRotate] SimplifyCFG: disable common instruction hoisting by... · 1d51dc38
  Roman Lebedev authored Jul 29, 2020
  1d51dc38
- [PowerPC] Set v1i128 to expand for SETCC to avoid crash · 802c0430
  Kang Zhang authored Jul 29, 2020
  802c0430
- [Statepoint] When using the tied def lowering, unconditionally use vregs [almost NFC] · 31342eb6
  Philip Reames authored Jul 29, 2020
  31342eb6
- [NewPM][Attributor] Pin tests with -attributor to legacy PM · 4a10029d
  Arthur Eubanks authored Jul 28, 2020
  4a10029d
- [InstSimplify] allow partial undef constants for vector min/max folds · 3e8534fb
  Sanjay Patel authored Jul 29, 2020
  
  3e8534fb
- [InstSimplify] fold integer min/max intrinsic with same args · 3c20ede1
  Sanjay Patel authored Jul 29, 2020
  
  3c20ede1
- [MachineVerifier] Handle the PHI node for verifyLiveVariables() · a4ade9ed
  Kang Zhang authored Jul 29, 2020
  a4ade9ed
- AMDGPU: Account for the size of LDS globals used through constant · d42c7b22
  Matt Arsenault authored Jul 17, 2020
  d42c7b22
- [SVE] Don't consider scalable vector types in SLPVectorizerPass::vectorizeChainsInBlock · 9ad7c980
  David Sherwood authored Jul 10, 2020
  9ad7c980
- [MachineCopyPropagation] BackwardPropagatableCopy: add check for hasOverlappingMultipleDef · 6a05c6bf
  Simon Wallis authored Jul 29, 2020
  6a05c6bf
- [DWARFYAML] Make the field names consistent with the DWARF spec. NFC. · bfa14037
  Xing GUO authored Jul 29, 2020
  bfa14037
- [ConstantFolding] fold integer min/max intrinsics · 9ee7d712
  Sanjay Patel authored Jul 29, 2020
  9ee7d712
- [ConstantFolding] add tests for integer min/max intrinsics; NFC · 9f958958
  Sanjay Patel authored Jul 29, 2020
  
  9f958958
- [CostModel][X86] Add SSE costs for SMAX/SMIN/UMAX/UMIN intrinsics · d1abca18
  Simon Pilgrim authored Jul 29, 2020
  
  d1abca18
- [InstSimplify] add tests for expandCommutativeBinOp; NFC · 672df0fc
  Juneyoung Lee authored Jul 29, 2020
  
  672df0fc
- [ConstantFolding] update test checks FP min/max intrinsics · 8c3262a7
  Sanjay Patel authored Jul 29, 2020
  8c3262a7
- [CostModel][X86] Add SSE costs for ABS intrinsics · 0a0f2825
  Simon Pilgrim authored Jul 29, 2020
  
  0a0f2825
- [ARM] Tune getCastInstrCost for extending masked loads and truncating masked stores · 9ddb2896
  David Green authored Jul 29, 2020
  9ddb2896
- [SVE][CodeGen] Add simple integer add tests for SVE tuple types · 20787717
  David Sherwood authored Jul 16, 2020
  20787717
- [ARM] Optimize immediate selection · 85342c27
  Sjoerd Meijer authored Jul 29, 2020
  85342c27
- AMDGPU: Make saturating add/sub legal for DAG path · c230965c
  Matt Arsenault authored Jul 13, 2020
  
  c230965c
- AMDGPU/GlobalISel: Select llvm.amdgcn.global.atomic.csub · cdd45d5f
  Matt Arsenault authored Jul 21, 2020
  cdd45d5f
- [SVE] Add checks for no warnings in CodeGen/AArch64/sve-sext-zext.ll · f43b5c7a
  David Sherwood authored Jul 03, 2020
  f43b5c7a
- [NewGVN] Require asserts for crashing tests. · 2aa2c40d
  Florian Hahn authored Jul 29, 2020
  2aa2c40d
- [LoopSimplifyCFG] Delete landing pads in dead exit blocks · 5d6cd619
  Yevgeny Rouban authored Jul 29, 2020
  5d6cd619
- [TTI] Add default cost expansion for abs/smax/smin/umax/umin intrinsics · c5ef1f1e
  Simon Pilgrim authored Jul 29, 2020
  
  c5ef1f1e
- [X86][SSE] getV4X86ShuffleImm8 - canonicalize broadcast masks · 0c005be6
  Simon Pilgrim authored Jul 29, 2020
  0c005be6
- [DWARFYAML][test] Make the check lines stricter. NFC. · 2f98eff3
  Xing GUO authored Jul 29, 2020
  2f98eff3
- [DWARFYAML] Replace uint*_t with yaml::Hex* in the 'debug_aranges' entry. · 334a7025
  Xing GUO authored Jul 29, 2020
  334a7025
- [InstCombine] Add tests for select(freeze(undef)); NFC · 1ae766e3
  Juneyoung Lee authored Jul 29, 2020
  
  1ae766e3
- [ThinLTO] [test] cache.ll: Prevent Spotlight indexing of the output dir · 60c889cf
  Azharuddin Mohammed authored Jul 28, 2020
  60c889cf
- [Hexagon] Correct the order of operands when lowering funnel shift-left · d50d4c3d
  Ikhlas Ajbar authored Jul 28, 2020
  d50d4c3d
- [llvm-readelf][test] Improve wording in the comments. NFC. · c12394fe
  Xing GUO authored Jul 29, 2020
  c12394fe
- AMDGPU: Optimize copies to exec with other insts after exec def · 44211f20
  Matt Arsenault authored Jul 23, 2020
  44211f20
- AMDGPU/GlobalISel: Fix selecting llvm.amdgcn.s.getreg · b6ebc773
  Matt Arsenault authored Jul 25, 2020
  b6ebc773
- [WebAssembly] Remove intrinsics for SIMD widening ops · 11bb7eef
  Thomas Lively authored Jul 28, 2020
  11bb7eef
- [X86] Add FeatureCMPXCHG8B and FeatureSlowUAMem16 to 'lakemont' in X86.td · 06cf6f77
  Craig Topper authored Jul 28, 2020
  06cf6f77
- [WebAssembly] Implement truncating vector stores · ffd8c23c
  Thomas Lively authored Jul 28, 2020
  ffd8c23c
- AMDGPU: Don't assume call targets are registers · 068808d1
  Matt Arsenault authored Jul 25, 2020
  068808d1