Commits · ff5ddf75e3b5eee33beece5216ad276b0b631fd9 · Roger Ferrer / llvm-epi · GitLab

Apr 23, 2018
- [X86] Add disassembler test cases for bswap. · ff5ddf75
  Craig Topper authored Apr 23, 2018
  ff5ddf75
- [SelectionDAG] Dump debug locs in SDNodes · f1772063
  Vedant Kumar authored Apr 23, 2018
  f1772063
- AMDGPU: Move a flawed assert when spilling SGPRs · b21f9592
  Matt Arsenault authored Apr 23, 2018
  b21f9592
- Fix computeSymbolSizes SEGFAULT on invalid file · bbe980df
  Adrian Prantl authored Apr 23, 2018
  bbe980df
- [LLVM-C] DIBuilderBindings for Subrange and Arrays · 6978db78
  Robert Widmann authored Apr 23, 2018
  6978db78
- Sort a target list a bit better. · 514837cc
  Nico Weber authored Apr 23, 2018
  514837cc
- [DEBUGINFO, NVPTX] Add the test for the debug info of the local · 6b2a5a6d
  Alexey Bataev authored Apr 23, 2018
  6b2a5a6d
- [LLVM-C] Finish Up Scope Bindings · b02fe644
  Robert Widmann authored Apr 23, 2018
  b02fe644
- AMDGPU: Fix a corner case crash in SIOptimizeExecMasking · 5a995664
  Nicolai Haehnle authored Apr 23, 2018
  5a995664
- [AArch64][SVE] Asm: Support for contiguous, non-faulting LDNF1 (scalar+imm) load instructions · 7893f722
  Sander de Smalen authored Apr 23, 2018
  7893f722
- [LoopRotate] Fix incorrect SCEV invalidation in loop rotation · 91f48166
  Max Kazantsev authored Apr 23, 2018
  91f48166
- [LoopSimplify] Fix incorrect SCEV invalidation · b1137c42
  Max Kazantsev authored Apr 23, 2018
  b1137c42
- [AArch64][SVE] Asm: Support for structured ST2, ST3 and ST4 (scalar+imm) store instructions. · 1b6d3744
  Sander de Smalen authored Apr 23, 2018
  1b6d3744
- [PM/LoopUnswitch] Remove a buggy assert in the new loop unswitch. · bf7190a1
  Chandler Carruth authored Apr 23, 2018
  bf7190a1
- [X86] Add VEX_WIG to VEX encoded version of VCMPPSY/VCMPPDY. · 3f1d5381
  Craig Topper authored Apr 23, 2018
  3f1d5381
Apr 22, 2018
- [llvm-mca][X86] Add BMI/LZCNT/POPCNT resource tests to all relevant models · 87ba905f
  Simon Pilgrim authored Apr 22, 2018
  87ba905f
- [LLVM-C] Add DIBuilder Bindings For Variable Creation · 12e367b6
  Robert Widmann authored Apr 22, 2018
  12e367b6
- [X86] Remove unnecessary WriteFBlend/WriteBlend InstRW overrides. · 06e16541
  Simon Pilgrim authored Apr 22, 2018
  06e16541
- [X86] Remove unnecessary WriteFMul/WriteFRcp/WriteFRsqrt InstRW overrides. · 091680b6
  Simon Pilgrim authored Apr 22, 2018
  091680b6
- [PatternMatch] allow undef elements when matching a vector zero · 30be665e
  Sanjay Patel authored Apr 22, 2018
  30be665e
- [InstCombine] add vector test with undef elts; NFC · c1265ab9
  Sanjay Patel authored Apr 22, 2018
  c1265ab9
- [X86] Fix (completely overridden) WriteFHAdd/WritePHAdd classes to allow us to... · ef8d3ae4
  Simon Pilgrim authored Apr 22, 2018
  ef8d3ae4
- [X86][MMX][SSE] Tag missed PHADD/PHSUB instructions with WritePHAdd · 2fd8269c
  Simon Pilgrim authored Apr 22, 2018
  2fd8269c
- [X86] Remove unnecessary WriteFVarBlend/WriteVarBlend InstRW overrides. · 96855ec3
  Simon Pilgrim authored Apr 22, 2018
  96855ec3
- [InstSimplify, InstCombine] add vector tests with undef elts; NFC · e187cd32
  Sanjay Patel authored Apr 22, 2018
  e187cd32
- [X86] Fix WriteMPSAD/WritePSADBW values to allow us to remove unnecessary instrw overrides. · a41ae2f0
  Simon Pilgrim authored Apr 22, 2018
  a41ae2f0
- [llvm-mca][X86] Add POPCNT resource test · 5e9f1da0
  Simon Pilgrim authored Apr 22, 2018
  5e9f1da0
- [test] Fix MC/ELF/nocompression.s · 3eecf73b
  Jonas Devlieghere authored Apr 22, 2018
  3eecf73b
- [llvm-mc] Make error handling more consistent. · c976aa7d
  Jonas Devlieghere authored Apr 22, 2018
  c976aa7d
- [X86] Remove DATA32_PREFIX. Hack the printing for DATA16_PREFIX to print... · e33ed7d6
  Craig Topper authored Apr 22, 2018
  e33ed7d6
- [bcanalyzer] Recognize more stream types · b1358898
  Brian Gesiak authored Apr 21, 2018
  b1358898
Apr 21, 2018
- [X86] Add DAG combine to turn (trunc (srl (mul ext, ext), 16) into PMULHW/PMULHUW. · fe59bea0
  Craig Topper authored Apr 21, 2018
  fe59bea0
- [X86] Add test cases that show the current codegen for (trunc (srl (mul ext, ext), 16)). NFC · 1b223e75
  Craig Topper authored Apr 21, 2018
  1b223e75
- [InstSimplify] move tests for shifts; NFC · 5f845732
  Sanjay Patel authored Apr 21, 2018
  5f845732
- [InstSimplify] move/add/regenerate checks for tests; NFC · d0b27a11
  Sanjay Patel authored Apr 21, 2018
  d0b27a11
- [llvm-mca][X86] Add AVX2 resource tests · e25aa02b
  Simon Pilgrim authored Apr 21, 2018
  e25aa02b
- [llvm-mca][X86] Add SSE resource tests to all models · d73bd154
  Simon Pilgrim authored Apr 21, 2018
  d73bd154
- [llvm-mca][X86] Add MMX resource tests · 26178d43
  Simon Pilgrim authored Apr 21, 2018
  26178d43
- [llvm-mca][X86] Add X87 resource tests · 1264066c
  Simon Pilgrim authored Apr 21, 2018
  1264066c
- [X86][X87] Add missing fldlg2 schedule test · 342cf586
  Simon Pilgrim authored Apr 21, 2018
  342cf586