Commits · ff60a0a364b49f1b52883b032f719548685081bd · Roger Ferrer / llvm-epi · GitLab

May 20, 2022
- [LLVM] Add a check if should cast atomic operations to integer type · ff60a0a3
  Shilei Tian authored May 20, 2022
  ff60a0a3
- [CodeView] Combine variable def ranges that are continuous. · 98860462
  Zequan Wu authored May 16, 2022
  98860462
- [AArch64] Use proper instruction mnemonics for FPRs · d497129f
  Bill Wendling authored May 20, 2022
  d497129f
- Recommit "[ConstantRange] Improve the implementation of binaryOr" · 9398caf3
  Alexander Shaposhnikov authored May 20, 2022
  9398caf3
- Revert "[ConstantRange] Improve the implementation of binaryOr" · 54e3bf5f
  Douglas Yung authored May 20, 2022
  54e3bf5f
- [InstructionSimplify] Remove multiple 'break' after 'return'. NFC · f2df53b7
  Craig Topper authored May 20, 2022
  
  f2df53b7
- [TypePromotion] Fix another case for sext vs zext in promoted constant. · 8d3894f6
  Craig Topper authored May 19, 2022
  8d3894f6
- [AMDGPU] Mark SMEM cache invalidations as not reading memory · 9af56c67
  Jay Foad authored May 19, 2022
  9af56c67
- [AMDGPU] Handle mandatory literals in isOperandLegal · 78ec59e6
  Jay Foad authored May 20, 2022
  78ec59e6
- [AMDGPU] Add verification for mandatory literals · 5b18ef72
  Jay Foad authored May 20, 2022
  5b18ef72
- Fix an unused variable warning in no-asserts build mode · 11a09af7
  Dmitri Gribenko authored May 20, 2022
  
  11a09af7
- [InstCombine] add use check to fold of bitwise logic with cast ops · f0071d43
  Sanjay Patel authored May 20, 2022
  f0071d43
- [SLP]Do not emit extract elements for insertelements users, replace with shuffles directly. · fc9c59c3
  Alexey Bataev authored Aug 04, 2021
  fc9c59c3
- [SLP][NFC]Use SmallPtrSet to avoid n*m complexity, NFC. · 4e271fc4
  Alexey Bataev authored May 20, 2022
  
  4e271fc4
- [AArch64] Generate AND in place of CSEL for predicated CTTZ · 534ea8bc
  Rahul Anand R authored May 20, 2022
  534ea8bc
- [RISCV] Fix logic for determining RVV stack padding · d60ae47f
  Fraser Cormack authored May 19, 2022
  d60ae47f
- [X86][AMX][NFC] Refactor X86LowerAMXCast.cpp · d5999bd3
  Luo, Yuanke authored May 20, 2022
  d5999bd3
- [AMDGPU][MC][GFX8+] Correct SMEM offset parsing · f598dfb3
  Dmitry Preobrazhensky authored May 20, 2022
  f598dfb3
- [ARM] Cost modelling for MVE vector fptoi_sat · b4dd9fc3
  David Green authored May 20, 2022
  b4dd9fc3
- [AArch64][SME]Tied up ZA operand for accumulate instructions · 4cd95104
  Caroline Concatto authored May 12, 2022
  4cd95104
- [AArch64][SME][NFC] Add implicit operands for SME instructions in the disassembly. · 8765ad42
  Caroline Concatto authored May 13, 2022
  8765ad42
- [LV] Do not LoopSimplify/LCSSA after generating main vector loop. · cd61d4bd
  Florian Hahn authored May 20, 2022
  cd61d4bd
- [AArch64] Fix the generation of BE Nops · 1379b150
  David Green authored May 20, 2022
  1379b150
- [RISCV] Add VL patterns for vector widening floating-point fused multiply-add instructions. · 8fc4fcec
  Jianjian GUAN authored Apr 27, 2022
  8fc4fcec
- [MIR] Provide location of extra instruction operand when diagnosing it. · 86803008
  Ivan Kosarev authored May 20, 2022
  86803008
- [InstCombine] [NFC] Use a pattern matcher for ExtractElementInst · cf348f6a
  Chenbing Zheng authored May 20, 2022
  cf348f6a
- [AArch64] Add support for -fzero-call-used-regs · 6e00a34c
  Bill Wendling authored May 19, 2022
  6e00a34c
May 19, 2022
- [DirectX backend] When cleanup module flags only remove unused flags. · c6c13d4e
  python3kgae authored May 17, 2022
  c6c13d4e
- Revert "[RISCV] Use selectShiftMaskXLen ComplexPattern for isel of rotates." · dfe513ae
  Craig Topper authored May 19, 2022
  dfe513ae
- [ConstantRange] Improve the implementation of binaryOr · 6990e747
  Alexander Shaposhnikov authored May 19, 2022
  6990e747
- Handle instrumentation of scalar single-precision (_ss) intrinsics · c153c61f
  Nicolas Capens authored May 19, 2022
  c153c61f
- [AMDGPU] Mark s_get_waveid_in_workgroup as not reading memory · 9ece0518
  Jay Foad authored May 19, 2022
  9ece0518
- [AMDGPU] Mark s_getreg as having side effects instead of reading memory · 86b55eda
  Jay Foad authored May 19, 2022
  86b55eda
- [LV] Drop wrap flags for reductions using VP def-use chain. · c90235f0
  Florian Hahn authored May 19, 2022
  c90235f0
- Revert "[ValueTracking] Added support to deduce PHI Nodes values being a power of 2" · 304a5a7a
  Nico Weber authored May 19, 2022
  304a5a7a
- [ARM] Cost modelling for scalar fptoi_sat · 80aab031
  David Green authored May 19, 2022
  80aab031
- [ValueTracking] Added support to deduce PHI Nodes values being a power of 2 · d5c130f1
  William Huang authored May 10, 2022
  d5c130f1
- [WebAssembly] Fix register use-def in FixIrreducibleControlFlow · cde083e0
  Heejin Ahn authored May 12, 2022
  cde083e0
- [Object] Fix updating darwin archives · 06624305
  Keith Smiley authored May 03, 2022
  06624305
- [ORC] Avoid more SymbolStringPtr copies. · 2ca81cd9
  Lang Hames authored May 18, 2022
  
  2ca81cd9