Commits · ffc18c33396b612c543868742fdbcb41a777a172 · Roger Ferrer / llvm-epi · GitLab

Mar 13, 2023
- Revert "[RISCV] Add separate lookup tables for fli.h and fli.d." · ffc18c33
  Craig Topper authored Mar 12, 2023
  ffc18c33
- Reland rGf35a09daebd0a90daa536432e62a2476f708150d and rG63854f91d3ee1056796a5ef27753648396cac6ec · 4f0ed16a
  Chen Zheng authored Dec 09, 2022
  4f0ed16a
- [SelectionDAG] Fix mismatched truncate when combine BUILD_VECTOR with EXTRACT_SUBVECTOR · 00eef4f7
  Jun Ma authored Mar 10, 2023
  00eef4f7
Mar 12, 2023
- [RISCV] Add separate lookup tables for fli.h and fli.d. · ebc11b68
  Craig Topper authored Mar 12, 2023
  ebc11b68
- [RISCV] Add test cases for fli.h and fli.d CodeGen bugs. NFC · 858451c5
  Craig Topper authored Mar 12, 2023
  858451c5
- [AMDGPU] Regenerate sdwa-peephole.ll · f759275c
  Simon Pilgrim authored Mar 12, 2023
  
  f759275c
- [amdgpu][nfc] Replace ad hoc LDS frame recalculation with absolute_symbol MD · d3dda422
  Jon Chesterfield authored Mar 12, 2023
  d3dda422
- [DAG] visitAND - fold (and (any_ext V), c) -> (zero_ext (and (trunc V), c)) if profitable. · b53ea2b9
  Simon Pilgrim authored Mar 12, 2023
  b53ea2b9
- [X86] and-shift.ll - add gnux32 test coverage to ensure the X32 ABI correctly... · 84547ec4
  Simon Pilgrim authored Mar 12, 2023
  84547ec4
- [X86] matchAddressRecursively - support zext(and(shl(x,c1)),c2) -> shl(zext(and(x, c2 >> c1),c1) · 47208f8d
  Simon Pilgrim authored Mar 12, 2023
  47208f8d
- Revert "[SPARC] Lower BR_CC to BPr on 64-bit target whenever possible" · eee590ca
  Brad Smith authored Mar 12, 2023
  eee590ca
Mar 11, 2023
- [SPARC] Lower BR_CC to BPr on 64-bit target whenever possible · 6590a372
  Koakuma authored Mar 11, 2023
  6590a372
- [SPARC] Implement hooks for conditional branch relaxation · 24e30019
  Koakuma authored Mar 11, 2023
  24e30019
- [X86] Add tests showing the failure to merge SHL/ADD through AND masks into LEA · 772aa054
  Simon Pilgrim authored Mar 11, 2023
  
  772aa054
- [DAG] combineShiftAnd1ToBitTest - improve support for peeking through truncations · fad852ef
  Simon Pilgrim authored Mar 11, 2023
  fad852ef
- [DAG] Add test showing combineShiftAnd1ToBitTest failing to peek through a truncation · e554cec4
  Simon Pilgrim authored Mar 11, 2023
  
  e554cec4
- [X86] Add unwind for base pointer test case. · 91f71539
  Luo, Yuanke authored Mar 11, 2023
  
  91f71539
- [X86] Add regcall CC test case for base pointer register. · b7021a3b
  Luo, Yuanke authored Mar 11, 2023
  
  b7021a3b
- [NVPTX] Sync generation of parameter names in a function signature with the function body. · 507c67d0
  Pavel Kopyl authored Feb 20, 2023
  507c67d0
- [Passes] Remove some legacy passes · 7c3c9814
  Arthur Eubanks authored Mar 08, 2023
  7c3c9814
Mar 10, 2023
- Revert "[X86] Drop single use check for freeze(undef) in LowerAVXCONCAT_VECTORS" · 6a02cd45
  ManuelJBrito authored Mar 10, 2023
  6a02cd45
- MachO: support custom section names on global variables · 5c184442
  Tim Northover authored Mar 10, 2023
  5c184442
- [RISCV] Support Zfa fli instructions with vector splats. · 30705e97
  Craig Topper authored Mar 10, 2023
  30705e97
- [RISCV] Print Zfa fli instruction FP values in a more adaptive way. · c2bcb21c
  Craig Topper authored Mar 10, 2023
  c2bcb21c
- [AArch64] Remove fixed FIXMEs from D120706. NFC · fb883911
  David Green authored Mar 10, 2023
  fb883911
- [AMDGPU][MachineVerifier] Fix vdata reg count for MIMG d16 · 2eada459
  Mirko Brkusanin authored Mar 10, 2023
  2eada459
- [LICM] Simplify (X < A && X < B) into (X < MIN(A, B)) if MIN(A, B) is loop-invariant · 6b03ce37
  Max Kazantsev authored Feb 20, 2023
  6b03ce37
- [FSAFDO] Improve FS discriminator encoding · ebe09e2a
  Rong Xu authored Mar 09, 2023
  ebe09e2a
- [CodeGen][AArch64] Generate Pseudo instructions for integer MLA/MAD/MLS/MSB · 7b338a69
  sgokhale authored Mar 10, 2023
  7b338a69
- [Test] Regenerate tests using update_llc_test_checks.py · 279f0c02
  Max Kazantsev authored Mar 10, 2023
  
  279f0c02
- [RISCV] Set how many bytes load from or store to stack slot · 7e929357
  Jim Lin authored Mar 10, 2023
  7e929357
- [RISCV] Pre-commit test case for D140460 · 865fb2e4
  Jim Lin authored Mar 10, 2023
  865fb2e4
- [SVE] Precommit multiuse predicated compare tests. · 990b11c5
  Paul Walker authored Mar 10, 2023
  
  990b11c5
Mar 09, 2023
- [X86] Drop single use check for freeze(undef) in LowerAVXCONCAT_VECTORS · 1a4d0eb8
  ManuelJBrito authored Mar 09, 2023
  1a4d0eb8
- [AMDGPU] Speedup GCNDownwardRPTracker::advanceBeforeNext · 8f6c47b7
  Valery Pykhtin authored Feb 28, 2023
  8f6c47b7
- AMDGPU: Update checks for a couple of tests. NFC · 99d053a9
  Diana Picus authored Mar 09, 2023
  
  99d053a9
- [X86] combineConcatVectorOps - add basic TRUNCATE handling on AVX512 targets · 8d4998b4
  Simon Pilgrim authored Mar 09, 2023
  8d4998b4
- [X86] Add test case showing failure to fold... · faea1c5c
  Simon Pilgrim authored Mar 09, 2023
  faea1c5c
- Revert "[X86] Drop single use check for freeze(undef) in LowerAVXCONCAT_VECTORS" · 85e6617b
  ManuelJBrito authored Mar 09, 2023
  85e6617b
- [X86] combineConcatVectorOps - add ADD/SUB/MUL handling · da92c120
  Simon Pilgrim authored Mar 09, 2023
  
  da92c120