Commits · 275a4f76c4b9f15cc0f73c38b8f9ee12e0e477d5 · Raul Torres / llvm-target-spread · GitLab

Nov 02, 2017
- AMDGPU: Fix warning discovered by r317266 [-Wunused-private-field] · 275a4f76
  Konstantin Zhuravlyov authored Nov 02, 2017
  275a4f76
- [Hexagon] Prefer L2_loadrub_io over L4_loadrub_rr · 058014fc
  Krzysztof Parzyszek authored Nov 02, 2017
  058014fc
- AMDGPU: Remove outdated fixme (it was already fixed) · b695cd41
  Konstantin Zhuravlyov authored Nov 02, 2017
  b695cd41
- [mips] Use register scavenging with MSA. · 725acb2d
  Simon Dardis authored Nov 02, 2017
  725acb2d
- [ARM] and, or, xor and add with shl combine · 242052c6
  Sam Parker authored Nov 02, 2017
  242052c6
- The patch updates sched numbers for YMM AVX instrs such as VMOVx, VORx, VXOR,... · 3c8bf5ec
  Andrew V. Tischenko authored Nov 02, 2017
  3c8bf5ec
- Revert "Correct dwarf unwind information in function epilogue for X86" · bb5c84fb
  Petar Jovanovic authored Nov 01, 2017
  bb5c84fb
Nov 01, 2017
- [X86] Use foreach in X86.td to combine some of the CPU names that are obviously aliases. NFC · 3837322a
  Craig Topper authored Nov 01, 2017
  3837322a
- [X86] Add CMOV feature to 'i686' processor, making it a proper alias of... · 7a754c46
  Craig Topper authored Nov 01, 2017
  7a754c46
- [X86][SSE] Add PACKUS support to LowerTruncate · e152c2c4
  Simon Pilgrim authored Nov 01, 2017
  e152c2c4
- [X86] Add custom code to EVEX to VEX pass to turn unmasked 128-bit VPALIGND/Q... · 4e56ba27
  Craig Topper authored Nov 01, 2017
  4e56ba27
- AMDGPU: Fix set but not used warnings related to AMDGPUAS · 435151ad
  Konstantin Zhuravlyov authored Nov 01, 2017
  435151ad
- [X86] Prevent fast isel from folding loads into the instructions listed in hasPartialRegUpdate. · ca1aa83c
  Craig Topper authored Nov 01, 2017
  ca1aa83c
- Adds code to PPC ISEL lowering to recognize half-word inserts from... · 67152614
  Graham Yiu authored Nov 01, 2017
  67152614
- [X86] Add 64-bit int to float/double conversion with AVX to X86FastISel::X86SelectSIToFP · 5ae677e1
  Craig Topper authored Nov 01, 2017
  5ae677e1
- Update VCVTx, VMOVNTPx and VROUNDYPx instructions scheduling on btver2. · 3d971e39
  Andrew V. Tischenko authored Nov 01, 2017
  3d971e39
- Correct dwarf unwind information in function epilogue for X86 · f2faee92
  Petar Jovanovic authored Nov 01, 2017
  f2faee92
- [X86][SSE] Begun generalizing truncateVectorWithPACKSS to work with PACKSS/PACKUS functions · 778810eb
  Simon Pilgrim authored Nov 01, 2017
  778810eb
- Revert r313618 "[ARM] Use ADDCARRY / SUBCARRY" · 9dfbc105
  Roger Ferrer Ibanez authored Nov 01, 2017
  9dfbc105
- Fix warnings discovered by rL317076. [-Wunused-private-field] · 1657f2ad
  NAKAMURA Takumi authored Nov 01, 2017
  1657f2ad
- Suppress a warning discovered by rL317076. [-Wunused-private-field] · f7d7a59b
  NAKAMURA Takumi authored Nov 01, 2017
  f7d7a59b
- [X86][SSE] Truncate with PACKSS any input with sufficient sign-bits · f657ba0c
  Simon Pilgrim authored Nov 01, 2017
  f657ba0c
- [X86] Add more type qualifiers to INSERT_SUBREG operations in rotate patterns... · 688f0ca6
  Craig Topper authored Nov 01, 2017
  688f0ca6
- [X86] Add AVX512 support to X86FastISel::fastMaterializeFloatZero. · a827f84d
  Craig Topper authored Nov 01, 2017
  a827f84d
- [AMDGPU] Clean up symbols in the global namespace. · f9ab3ddb
  Benjamin Kramer authored Oct 31, 2017
  f9ab3ddb
Oct 31, 2017
- AMDGPU: Select s_buffer_load_dword with a non-constant SGPR offset · 5914ece6
  Marek Olsak authored Oct 31, 2017
  5914ece6
- [X86][AsmParser] Treat '%' as the modulo operator under Intel syntax · 39970069
  Reid Kleckner authored Oct 31, 2017
  39970069
- [X86][SSE] Add VSRLI/VSRAI/VSLLI demanded elts support to computeKnownBits/ComputeNumSignBits · f3c33ca8
  Simon Pilgrim authored Oct 31, 2017
  f3c33ca8
- [AVX512] Adding new patterns for extract_subvector of vXi1 · 9e58831c
  Michael Zuckerman authored Oct 31, 2017
  9e58831c
- [X86] Make AVX512_512_SET0 XMM16-31 lower to 128-bit XOR when AVX512VL is... · beed6531
  Craig Topper authored Oct 31, 2017
  beed6531
- [X86] Clang-format some code. NFC · 668b1ab6
  Craig Topper authored Oct 31, 2017
  668b1ab6
Oct 30, 2017
- [AArch64]: range loopify frame-lowering · d13d419d
  Javed Absar authored Oct 30, 2017
  d13d419d
- [X86] Add AVX512 support to fast isel's X86ChooseCmpOpcode. · 9f01f609
  Craig Topper authored Oct 30, 2017
  9f01f609
- Revert "[PowerPC] Try to simplify a Swap if it feeds a Splat" · 6262fd4b
  Stefan Pintilie authored Oct 30, 2017
  6262fd4b
- [X86][AVX512] Adding a pattern for broadcastm intrinsic. · 5bf6620b
  Jina Nahias authored Oct 30, 2017
  5bf6620b
- Move isDSOLocal check and add a comment. · 6f36637b
  Rafael Espindola authored Oct 30, 2017
  6f36637b
- [PPC CodeGen] Fix the bitreverse.i64 intrinsic. · 2696db90
  Fangrui Song authored Oct 30, 2017
  2696db90
- [X86] Make sure we don't create locked inc/dec instructions when the carry flag is being used. · 4e13d4de
  Craig Topper authored Oct 30, 2017
  4e13d4de
- [X86] Remove AVX512 early out from X86FastISel::X86SelectCmp. · 367cc12f
  Craig Topper authored Oct 30, 2017
  367cc12f
- [AMDGPU] Emit metadata for hidden arguments for kernel enqueue · c928f2a6
  Yaxun Liu authored Oct 30, 2017
  c928f2a6