Commits · 67aa18f165640374cf0e0a6226dc793bbda6e74f · Raul Torres / llvm-target-spread · GitLab

Jun 28, 2018
- [AMDGPU] Early expansion of 32 bit udiv/urem · 67aa18f1
  Stanislav Mekhanoshin authored Jun 28, 2018
  67aa18f1
- [AMDGPU] Overload llvm.amdgcn.fmad.ftz to support f16 · 298a6159
  Stanislav Mekhanoshin authored Jun 28, 2018
  298a6159
- [ARM] Parallel DSP Pass · c89ca558
  Sjoerd Meijer authored Jun 28, 2018
  c89ca558
- AMDGPU: Error on calls from graphics shaders · 1fb90133
  Matt Arsenault authored Jun 28, 2018
  1fb90133
- AMDGPU: Fix assert on aggregate type kernel arguments · 513e0c0e
  Matt Arsenault authored Jun 28, 2018
  513e0c0e
- [DAGCombiner] Ensure we use the correct CC result type in visitSDIV · abebe4c7
  Simon Pilgrim authored Jun 28, 2018
  abebe4c7
Jun 27, 2018
- [RISCV] Add machine function pass to merge base + offset · 9b65ffb0
  Sameer AbuAsal authored Jun 27, 2018
  9b65ffb0
- [WebAssembly] Try fixing test/CodeGen/WebAssembly/vector_sdiv.ll · 5dc371a7
  Fangrui Song authored Jun 27, 2018
  5dc371a7
- [globalisel][legalizer] Add AtomicOrdering to LegalityQuery and use it in AArch64 · bdeb880d
  Daniel Sanders authored Jun 27, 2018
  bdeb880d
- [DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros · d052de85
  Sanjay Patel authored Jun 27, 2018
  d052de85
- [MachineOutliner] Don't outline sequences where x16/x17/nzcv are live across · f472f615
  Jessica Paquette authored Jun 27, 2018
  f472f615
- [X86] Use bts/btr/btc for single bit set/clear/complement of a variable bit position · 812fcb35
  Craig Topper authored Jun 27, 2018
  812fcb35
- [X86] Add test cases for D48606. · 069628b4
  Craig Topper authored Jun 27, 2018
  069628b4
- [X86][SSE] Add missing AVX512 rotation tests · 8a02b253
  Simon Pilgrim authored Jun 27, 2018
  8a02b253
- [X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that... · 31cbe75b
  Craig Topper authored Jun 27, 2018
  31cbe75b
- [AMDGPU] Convert rcp to rcp_iflag · 1a1687f1
  Stanislav Mekhanoshin authored Jun 27, 2018
  1a1687f1
- [AArch64] Reverting FP16 vcvth_n_s64_f16 to fix · 31632715
  Luke Geeson authored Jun 27, 2018
  31632715
- [AArch64] Add custom lowering for v4i8 trunc store · cadcfed7
  Adhemerval Zanella authored Jun 27, 2018
  cadcfed7
- [NEON] Support vldNq intrinsics in AArch32 (LLVM part) · 7231598f
  Ivan A. Kosarev authored Jun 27, 2018
  7231598f
- [DAGCombiner] visitSDIV - add special case handling for (sdiv X, 1) -> X in pow2 expansion · d3e583a5
  Simon Pilgrim authored Jun 27, 2018
  d3e583a5
- [X86][SSE] Include MIN_SIGNED element in non-uniform SDIV pow2 tests · 41afbcb9
  Simon Pilgrim authored Jun 27, 2018
  41afbcb9
- [DAGCombiner] Fold SDIV(%X, MIN_SIGNED) -> SELECT(%X == MIN_SIGNED, 1, 0) · dfbcc66a
  Simon Pilgrim authored Jun 27, 2018
  dfbcc66a
- [DAGCombiner] Don't accept signbit sdiv divisors in sdiv-by-pow2 vector expansion (PR37569) · 0a566bc0
  Simon Pilgrim authored Jun 27, 2018
  0a566bc0
- [AArch64] Remove Duplicate FP16 Patterns with same encoding, match on existing patterns · 68cb233c
  Luke Geeson authored Jun 27, 2018
  68cb233c
- [X86] Add test for SDIV by sign bit (minsigned) value · c9e60adc
  Simon Pilgrim authored Jun 26, 2018
  c9e60adc
Jun 26, 2018
- [X86][AsmParser] Recommit r335658 · 67599c2e
  Jessica Paquette authored Jun 26, 2018
  67599c2e
- Revert "[X86][AsmParser] Emit an error when RIP-relative instructions are used in 32-bit mode" · 0a80af07
  Jessica Paquette authored Jun 26, 2018
  0a80af07
- [X86][AsmParser] Emit an error when RIP-relative instructions are used in 32-bit mode · 0e40d4bf
  Jessica Paquette authored Jun 26, 2018
  0e40d4bf
- [AMDGPU] Add llvm.amdgcn.fmad.ftz intrinsic · dacda79e
  Stanislav Mekhanoshin authored Jun 26, 2018
  dacda79e
- AMDGPU: Add pass to lower kernel arguments to loads · 8c4a3523
  Matt Arsenault authored Jun 26, 2018
  8c4a3523
- [Hexagon] Add a "generic" cpu · b7169c43
  Brendon Cahoon authored Jun 26, 2018
  b7169c43
- [DAGCombiner] Don't accept -1 sdiv divisors in sdiv-by-pow2 vector expansion (PR37119) · 7f55af37
  Simon Pilgrim authored Jun 26, 2018
  7f55af37
- [X86][SSE] Add another sdiv by (nonuniform) minus one test (PR37119) · 1576df53
  Simon Pilgrim authored Jun 26, 2018
  1576df53
- Account for undef values from predecessors in extendSegmentsToUses · 70f02702
  Krzysztof Parzyszek authored Jun 26, 2018
  70f02702
- [X86,ARM] Retain split-stack prolog check for sibling calls · 3190993a
  Than McIntosh authored Jun 26, 2018
  3190993a
- [WebAssembly] Fix lowering of varargs functions with non-legal fixed arguments. · 910ba33d
  Dan Gohman authored Jun 26, 2018
  910ba33d
- [X86] Use XOR for SUB (C, X) during isel if will help fold an immediate · c42ed4e3
  Craig Topper authored Jun 26, 2018
  c42ed4e3
- [X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and... · 689e363f
  Craig Topper authored Jun 26, 2018
  689e363f
- Revert r335562 and 335563 "[X86] Redefine avx512 packed fpclass intrinsics to... · 6f4fdfa9
  Craig Topper authored Jun 26, 2018
  6f4fdfa9
- [X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and... · c2ee4a50
  Craig Topper authored Jun 26, 2018
  c2ee4a50