Commits · 865f7fecb28cd517fe2fa104522b71016ba8c77d · Raul Torres / llvm-target-spread · GitLab

Jan 04, 2018
- [ARM GlobalISel] Select G_PHI · 865f7fec
  Diana Picus authored Jan 04, 2018
  865f7fec
- [ARM GlobalISel] Legalize scalar G_PHI · c768bbe2
  Diana Picus authored Jan 04, 2018
  c768bbe2
- [ARM GlobalISel] Fix selection of pointer constants · 37ae9f68
  Diana Picus authored Jan 04, 2018
  37ae9f68
- [GVNHoist] Fix: PR35222 gvn-hoist incorrectly erases load in case of a loop · 1f90cae8
  Aditya Kumar authored Jan 04, 2018
  1f90cae8
- Changes in the branch relaxation algorithm. · b8f2978b
  Elena Demikhovsky authored Jan 04, 2018
  b8f2978b
- support phi ranges for machine-level IR · 90ecac01
  Bob Wilson authored Jan 04, 2018
  90ecac01
- Do not look up symbol names when n_strx == 0 · ca30902f
  Michael Trent authored Jan 03, 2018
  ca30902f
Jan 03, 2018
- [DAGCombine] Handle out of range EXTRACT_VECTOR_ELT indices · ec0a2fb7
  Simon Pilgrim authored Jan 03, 2018
  ec0a2fb7
- [ExpandMemcmp] rename variables and add hook to override pref for number of loads per block; NFC · f344987c
  Sanjay Patel authored Jan 03, 2018
  f344987c
- [X86] Remove 'else' after 'return' I forgot to cleanup before committing D41691. · e6e9c275
  Craig Topper authored Jan 03, 2018
  e6e9c275
- AMDGPU: Remove dead file · 4ff5e002
  Matt Arsenault authored Jan 03, 2018
  4ff5e002
- StructurizeCFG: Fix broken backedge detection · 8070882b
  Matt Arsenault authored Jan 03, 2018
  8070882b
- [InstCombine] Check for out of range shift values using APInt before calling getZExtValue · 3bf2d645
  Simon Pilgrim authored Jan 03, 2018
  3bf2d645
- [X86] Remove useless custom inserter for 64-bit TAILJMP and TCRETURN opcodes · 8232e88d
  Craig Topper authored Jan 03, 2018
  8232e88d
- [X86] Use ANY_EXTEND instead of SIGN_EXTEND in lowerMasksToReg · cc6637b7
  Craig Topper authored Jan 03, 2018
  cc6637b7
- Remove left-over debug printout from r321692 · 79985490
  Hans Wennborg authored Jan 03, 2018
  79985490
- [InstSimplify] Missed optimization in math expression: squashing exp(log), log(exp) · 3d8cd34a
  Dmitry Venikov authored Jan 03, 2018
  3d8cd34a
- [ARM][NFC] Avoid recreating MCSubtargetInfo in ARMAsmBackend · 46db78b7
  Alex Bradbury authored Jan 03, 2018
  46db78b7
- [AArch64][SVE] Asm: Add restricted register classes for SVE predicate vectors. · dc5e081b
  Sander de Smalen authored Jan 03, 2018
  dc5e081b
- Fix build of WebAssembly and AVR backends after r321692 · 7c093bf1
  Alex Bradbury authored Jan 03, 2018
  7c093bf1
- Thread MCSubtargetInfo through Target::createMCAsmBackend · b22f751f
  Alex Bradbury authored Jan 03, 2018
  b22f751f
- [GlobalISel][Legalizer] Fix legalization of llvm.smul.with.overflow · 9de62130
  Amara Emerson authored Jan 03, 2018
  9de62130
Jan 02, 2018
- Handle the case of live 16-bit subregisters in X86FixupBWInsts · e12e08c6
  Andrew Kaylor authored Jan 02, 2018
  e12e08c6
- [ValueTracking] recognize min/max of min/max patterns · 78114305
  Sanjay Patel authored Jan 02, 2018
  78114305
- [AArch64][GlobalISel] Fix assert fail with unknown intrinsic. · 913918cb
  Amara Emerson authored Jan 02, 2018
  913918cb
- [x86] allow pairs of PCMPEQ for vector-sized integer equality comparisons (PR33325) · 9a80871f
  Sanjay Patel authored Jan 02, 2018
  9a80871f
- [AArch64][GlobalISel] Enable GlobalISel at -O0 by default · 854d10d1
  Amara Emerson authored Jan 02, 2018
  854d10d1
- [BasicBlockUtils] Check for unreachable preds before updating LI in UpdateAnalysisInformation · bdb94309
  Anna Thomas authored Jan 02, 2018
  bdb94309
- [Hexagon] Fix generation of vector sign extensions · cfe4a361
  Krzysztof Parzyszek authored Jan 02, 2018
  cfe4a361
- Revert r321089: "[DAG] Elide overlapping store" (and subsequent fix in r321204) · cc4903e2
  Daniel Jasper authored Jan 02, 2018
  cc4903e2
- [AArch64][AsmParser] Add isScalarReg() and repurpose isReg() · c9b3e1cf
  Sander de Smalen authored Jan 02, 2018
  c9b3e1cf
- Strip trailing whitespace. NFCI · 39f50e10
  Simon Pilgrim authored Jan 02, 2018
  39f50e10
- [RISCV] Add Defs Uses information for c.jal and c.addi4spn · 8cb894b3
  Alex Bradbury authored Jan 02, 2018
  8cb894b3
- [RISCV][NFC] Resolve unused variable warning in RISCVISelLowering · 3633d120
  Alex Bradbury authored Jan 02, 2018
  3633d120
- [DAGCombine] Fix for PR35765 · 3570c554
  Sam Parker authored Jan 02, 2018
  3570c554
- [SelectionDAG] Teach WidenVecOp_Convert to widen the operation if a widened... · e3b6bd33
  Craig Topper authored Jan 02, 2018
  e3b6bd33
- [InstCombine] Missed optimization in math expression: squashing sqrt functions · a58d8deb
  Dmitry Venikov authored Jan 02, 2018
  a58d8deb
- Test commit · d2257be8
  Dmitry Venikov authored Jan 02, 2018
  d2257be8
- [SelectionDAG] Remove ifs on getTypeAction being TypeWidenVector from some of... · 3e528c75
  Craig Topper authored Jan 02, 2018
  3e528c75
Jan 01, 2018
- [ValueTracking] Don't assume shift values are in range · 6720726d
  Simon Pilgrim authored Jan 01, 2018
  6720726d