Commits · 0a5e90cc2a6d954ee0c2fae99e0f5d0cb82b3168 · Lorenzo Albano / LLVM bpEVL · GitLab

Jun 19, 2018
- [X86] Add a new VEX_WPrefix encoding to tag EVEX instruction that have... · 0a5e90cc
  Craig Topper authored Jun 19, 2018
  0a5e90cc
- [X86] Simplify the TSFlags checking code in EvexToVexInstPass. NFCI · 46c0b368
  Craig Topper authored Jun 19, 2018
  46c0b368
- [WebAssembly] Add more utility functions · 817811ca
  Heejin Ahn authored Jun 19, 2018
  817811ca
- [WebAssembly] Make rethrow instruction take a target BB argument · 6279d712
  Heejin Ahn authored Jun 18, 2018
  6279d712
- [X86] Remove ReadAfterLd from avx512_shift_rmbi multiclass. · a7b7f2f4
  Craig Topper authored Jun 18, 2018
  a7b7f2f4
- Tidy comment language and explanation. · 88bbad24
  Eric Christopher authored Jun 18, 2018
  88bbad24
- Pull non-lazy stub table emission into a separate function alongside · b1faaf30
  Eric Christopher authored Jun 18, 2018
  b1faaf30
- Add return statements to make it clear that all of these are mutually exclusive conditions. · b6d0b99f
  Eric Christopher authored Jun 18, 2018
  b6d0b99f
Jun 18, 2018
- [WebAssembly] Modified tablegen defs to have 2 parallel instuction sets. · 48dac310
  Wouter van Oortmerssen authored Jun 18, 2018
  48dac310
- [AArch64][SVE] Asm: Fix predicate pattern diagnostics. · 067eee1c
  Sander de Smalen authored Jun 18, 2018
  067eee1c
- [AArch64][SVE] Asm: Support for saturating INC/DEC (32bit scalar) instructions. · 7ac9e193
  Sander de Smalen authored Jun 18, 2018
  7ac9e193
- [WebAssembly] Cleaned up register accessors in WebAssemblyMachineFunctionInfo.h · 78c62966
  Wouter van Oortmerssen authored Jun 18, 2018
  78c62966
- [X86] Encode the EVEX2VEX exception list information in .td files instead of the emitter source. · 17bd84c1
  Craig Topper authored Jun 18, 2018
  17bd84c1
- [AArch64][SVE] Asm: Support for saturating INC/DEC (64bit scalar) instructions. · 13684d84
  Sander de Smalen authored Jun 18, 2018
  13684d84
- [X86][BtVer2] Flag AVX2+ scheduler classes as unsupported · 9173c97c
  Simon Pilgrim authored Jun 18, 2018
  9173c97c
- [AArch64][SVE] Asm: Support for vector element compares. · d521c435
  Sander de Smalen authored Jun 18, 2018
  d521c435
- [X86] Fix NOOP sched overrides on BDW/HSW/SKL. · 0d9da88d
  Clement Courbet authored Jun 18, 2018
  0d9da88d
- [X86] Create X86InstrFMA3Group objects fully in a static table instead of on the heap. NFCI · f0ab7bd1
  Craig Topper authored Jun 18, 2018
  f0ab7bd1
- [X86] Add '.s' aliases to the assembler for the various redundant move... · 16fdde5e
  Craig Topper authored Jun 18, 2018
  16fdde5e
- [X86] Move the 'vmovq.s' and similar assembly strings for EVEX vector moves... · 916d0cf6
  Craig Topper authored Jun 18, 2018
  916d0cf6
Jun 17, 2018
- [X86] Add all the FMA instructions direclty to the load folding table instead... · 9fe45d84
  Craig Topper authored Jun 17, 2018
  9fe45d84
- [X86] Pass the parent SDNode to X86DAGToDAGISel::selectScalarSSELoad to... · b0e986f8
  Craig Topper authored Jun 17, 2018
  b0e986f8
- [AArch64][SVE] Asm: Support for bitwise operations on predicate vectors. · 279b7e74
  Sander de Smalen authored Jun 17, 2018
  279b7e74
- [AArch64][SVE] Asm: Support for SEL (vector/predicate) instructions. · 2c25b4cd
  Sander de Smalen authored Jun 17, 2018
  2c25b4cd
- [NVPTX] Ignore target-cpu and -features for inlining · c7410ed4
  Jonas Hahnfeld authored Jun 17, 2018
  c7410ed4
- [WebAssembly] Simple comment fix. NFC. · 97869467
  Heejin Ahn authored Jun 17, 2018
  97869467
- [X86] More additions to the load folding tables based on the autogenerated tables. · 29f22d7b
  Craig Topper authored Jun 16, 2018
  29f22d7b
- [X86] Hide POP16/32/64rmr and PUSH16/32/64rmr instructions from the assembly parser. · c4356328
  Craig Topper authored Jun 16, 2018
  c4356328
- [X86] Fix an inconsistency between AVX512 and AVX/SSE version on a couple instructions. · 74412c7d
  Craig Topper authored Jun 16, 2018
  74412c7d
Jun 16, 2018
- [AMDGPU] setcc (select cc, CT, CF), CF, eq | ne -> xor cc, -1 | cc · 3b11794d
  Stanislav Mekhanoshin authored Jun 16, 2018
  3b11794d
- [globalisel][tablegen] Add support for C++ predicates on PatFrags and use it to support BFC on ARM. · 8ead1290
  Daniel Sanders authored Jun 15, 2018
  8ead1290
- [X86] Add more instructions to the hasUndefRegUpdate list. · d00e3753
  Craig Topper authored Jun 15, 2018
  d00e3753
Jun 15, 2018
- [PowerPC] Add support for high and higha symbol modifiers on tls modifers. · cac28aeb
  Sean Fertile authored Jun 15, 2018
  cac28aeb
- [PPC64] Support "symbol@high" and "symbol@higha" symbol modifers. · 80b8f82f
  Sean Fertile authored Jun 15, 2018
  80b8f82f
- [X86] Lowering sqrt intrinsics to native IR · bcaab53d
  Tomasz Krupa authored Jun 15, 2018
  bcaab53d
- [X86] Prevent folding stack reloads into instructions in hasUndefRegUpdate. · 1657b7b8
  Craig Topper authored Jun 15, 2018
  1657b7b8
- [AArch64][SVE] Asm: Support for CPY SIMD/FP and GPR instructions. · a6edca72
  Sander de Smalen authored Jun 15, 2018
  a6edca72
- [AArch64][SVE] Asm: Support for INC/DEC (scalar) instructions. · 18ac8f9f
  Sander de Smalen authored Jun 15, 2018
  18ac8f9f
- AMDGPU: Add combine for short vector extract_vector_elts · 63bc0e3c
  Matt Arsenault authored Jun 15, 2018
  63bc0e3c
- AMDGPU: Make v4i16/v4f16 legal · 02dc7e19
  Matt Arsenault authored Jun 15, 2018
  02dc7e19