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  1. Jul 09, 2019
    • Stanislav Mekhanoshin's avatar
      [AMDGPU] gfx908 clang target · 0cfd75a0
      Stanislav Mekhanoshin authored
      Differential Revision: https://reviews.llvm.org/D64430
      
      llvm-svn: 365528
      0cfd75a0
    • Stella Stamenova's avatar
      [lldb-suite] Skip TestMachCore on Windows · 2ea514c5
      Stella Stamenova authored
      This test was originally marked as expected failure on Windows, but it is timing out instead of outright failing now. The expectedFailure attribute does not correctly track timeouts (as in, they don't count as failures), so now this is causing the test suite to fail.
      
      llvm-svn: 365527
      2ea514c5
    • Stella Stamenova's avatar
    • Stanislav Mekhanoshin's avatar
      [AMDGPU] gfx908 target · 22b2c3d6
      Stanislav Mekhanoshin authored
      Differential Revision: https://reviews.llvm.org/D64429
      
      llvm-svn: 365525
      22b2c3d6
    • Sean Fertile's avatar
      [Object][XCOFF] Add support for 64-bit file header and section header dumping. · 837ae69f
      Sean Fertile authored
      Adds a readobj dumper for 32-bit and 64-bit section header tables, and extend
      support for the file-header dumping to include 64-bit object files. Also
      refactors the binary file parsing to be done in a helper function in an attempt
      to cleanup error handeling.
      
      Differential Revision: https://reviews.llvm.org/D63843
      
      llvm-svn: 365524
      837ae69f
    • Sanjay Patel's avatar
      [InstCombine] add tests for trunc(load); NFC · 5f4d7c9d
      Sanjay Patel authored
      I'm not sure if transforming any of these is valid as
      a target-independent fold, but we might as well have
      a few tests here to confirm or deny our position.
      
      llvm-svn: 365523
      5f4d7c9d
    • Sam McCall's avatar
      [clangd] Show documentation in hover, and fetch docs from index if needed. · 5a458d6a
      Sam McCall authored
      Summary:
      I assume showing docs is going to be part of structured hover rendering, but
      it's unclear whether that's going to make clangd 9 so this is low-hanging fruit.
      
      (Also fixes a bug uncovered in FormattedString's plain text output: need blank
      lines when text follows codeblocks)
      
      Reviewers: kadircet
      
      Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D64296
      
      llvm-svn: 365522
      5a458d6a
    • Matt Arsenault's avatar
      AMDGPU: Fix test failing since r365512 · 077df019
      Matt Arsenault authored
      llvm-svn: 365521
      077df019
    • Jinsong Ji's avatar
      Revert "[HardwareLoops] NFC - move hardware loop checking code to isHardwareLoopProfitable()" · 06fef0b3
      Jinsong Ji authored
      This reverts commit d9555730.
      
      llvm-svn: 365520
      06fef0b3
    • Steven Wu's avatar
      Add lit.local.cfg to llvm-objdump tests · 65f964c2
      Steven Wu authored
      Add configuration file to llvm-objdump tests to treat files with .yaml
      extension as tests.
      
      llvm-svn: 365519
      65f964c2
    • Erik Pilkington's avatar
    • Nico Weber's avatar
      Remove a comment that has been obsolete since r327679 · 0efac296
      Nico Weber authored
      llvm-svn: 365517
      0efac296
    • Michael Liao's avatar
      [unittest] Add bogus register info. · 329c0320
      Michael Liao authored
      Reviewers: dstenb
      
      Subscribers: llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D64421
      
      llvm-svn: 365516
      329c0320
    • Nico Weber's avatar
      Rename llvm/test/tools/llvm-pdbdump to llvm/test/tools/llvm-pdbutil · c9c55cf8
      Nico Weber authored
      llvm-pdbdump was renamed to llvm-pdbutil long ago. This updates the test
      to be where you'd expect them to be.
      
      llvm-svn: 365515
      c9c55cf8
    • Nico Weber's avatar
      Make pdbdump-objfilename test work again · ce84e6ae
      Nico Weber authored
      - The test had extension .yaml, which lit doesn't execute in this
        directory. Rename to .test to make it run, and move the yaml bits
        into a dedicated file, like with all other tests in this dir.
      
      - llvm-pdbdump got renamed to llvm-pdbutil long ago, update test.
      
      - -dbi-module-info got renamed in r305032, update test for this too.
      
      llvm-svn: 365514
      ce84e6ae
    • Julian Lettner's avatar
      [TSan] Improve handling of stack pointer mangling in {set,long}jmp, pt.8 · 521f77e6
      Julian Lettner authored
      Refine longjmp key management.  For Linux, re-implement key retrieval in
      C (instead of assembly).  Removal of `InitializeGuardPtr` and a final
      round of cleanups will be done in the next commit.
      
      Reviewed By: dvyukov
      
      Differential Revision: https://reviews.llvm.org/D64092
      
      llvm-svn: 365513
      521f77e6
    • Christudasan Devadasan's avatar
      [AMDGPU] Created a sub-register class for the return address operand in the return instruction. · b2d24bd5
      Christudasan Devadasan authored
      Function return instruction lowering, currently uses the fixed register pair s[30:31] for holding
      the return address. It can be any SGPR pair other than the CSRs. Created an SGPR pair sub-register class
      exclusive of the CSRs, and used this regclass while lowering the return instruction.
      
      Reviewed By: arsenm
      
      Differential Revision: https://reviews.llvm.org/D63924
      
      llvm-svn: 365512
      b2d24bd5
    • Sam Elliott's avatar
      [RISCV] Fix ICE in isDesirableToCommuteWithShift · 114d2db4
      Sam Elliott authored
      Summary:
      There was an error being thrown from isDesirableToCommuteWithShift in
      some tests. This was tracked down to the method being called before
      legalisation, with an extended value type, not a machine value type.
      
      In the case I diagnosed, the error was only hit with an instruction sequence
      involving `i24`s in the add and shift. `i24` is not a Machine ValueType, it is
      instead an Extended ValueType which was causing the issue.
      
      I have added a test to cover this case, and fixed the error in the callback.
      
      Reviewers: asb, luismarques
      
      Reviewed By: asb
      
      Subscribers: hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D64425
      
      llvm-svn: 365511
      114d2db4
    • Amara Emerson's avatar
      [AArch64][GlobalISel] Optimize conditional branches followed by unconditional branches · 6616e269
      Amara Emerson authored
      If we have an icmp->brcond->br sequence where the brcond just branches to the
      next block jumping over the br, while the br takes the false edge, then we can
      modify the conditional branch to jump to the br's target while inverting the
      condition of the incoming icmp. This means we can eliminate the br as an
      unconditional branch to the fallthrough block.
      
      Differential Revision: https://reviews.llvm.org/D64354
      
      llvm-svn: 365510
      6616e269
    • Hiroshi Yamauchi's avatar
      Revert Revert Devirtualize destructor of final class. · d088720e
      Hiroshi Yamauchi authored
      Revert r364359 and recommit r364100.
      
      r364100 was reverted as r364359 due to an internal test failure, but it was a
      false alarm.
      
      llvm-svn: 365509
      d088720e
    • Simon Atanasyan's avatar
      [mips] Show error in case of using FP64 mode on pre MIPS32R2 CPU · e3892d84
      Simon Atanasyan authored
      llvm-svn: 365508
      e3892d84
    • Simon Atanasyan's avatar
      [mips] Explicitly select `mips32r2` CPU for test cases require 64-bit FPU. NFC · 623282f0
      Simon Atanasyan authored
      Support for 64-bit coprocessors on a 32-bit architecture
      was added in `MIPS32 R2`.
      
      llvm-svn: 365507
      623282f0
    • David Bolvansky's avatar
      [NFC] Fixed tests · 901d91e5
      David Bolvansky authored
      llvm-svn: 365506
      901d91e5
    • Mikhail Maltsev's avatar
      [libunwind] Fix Unwind-EHABI.cpp:getByte on big-endian targets · a448ed99
      Mikhail Maltsev authored
      Summary:
      The function getByte is dependent on endianness and the current
      behavior is incorrect on big-endian targets.
      
      This patch fixes the issue.
      
      Reviewers: phosek, ostannard, dmgreen, christof, chill
      
      Reviewed By: ostannard, chill
      
      Subscribers: chill, christof, libcxx-commits
      
      Tags: #libc
      
      Differential Revision: https://reviews.llvm.org/D64402
      
      llvm-svn: 365505
      a448ed99
    • Simon Pilgrim's avatar
      [DAGCombine] LoadedSlice - keep getOffsetFromBase() uint64_t offset. NFCI. · 57603cbd
      Simon Pilgrim authored
      Keep the uint64_t type from getOffsetFromBase() to stop truncation/extension overflow warnings in MSVC in alignment math.
      
      llvm-svn: 365504
      57603cbd
    • Yonghong Song's avatar
      [BPF] Support for compile once and run everywhere · d3d88d08
      Yonghong Song authored
      Introduction
      ============
      
      This patch added intial support for bpf program compile once
      and run everywhere (CO-RE).
      
      The main motivation is for bpf program which depends on
      kernel headers which may vary between different kernel versions.
      The initial discussion can be found at https://lwn.net/Articles/773198/
      
      .
      
      Currently, bpf program accesses kernel internal data structure
      through bpf_probe_read() helper. The idea is to capture the
      kernel data structure to be accessed through bpf_probe_read()
      and relocate them on different kernel versions.
      
      On each host, right before bpf program load, the bpfloader
      will look at the types of the native linux through vmlinux BTF,
      calculates proper access offset and patch the instruction.
      
      To accommodate this, three intrinsic functions
         preserve_{array,union,struct}_access_index
      are introduced which in clang will preserve the base pointer,
      struct/union/array access_index and struct/union debuginfo type
      information. Later, bpf IR pass can reconstruct the whole gep
      access chains without looking at gep itself.
      
      This patch did the following:
        . An IR pass is added to convert preserve_*_access_index to
          global variable who name encodes the getelementptr
          access pattern. The global variable has metadata
          attached to describe the corresponding struct/union
          debuginfo type.
        . An SimplifyPatchable MachineInstruction pass is added
          to remove unnecessary loads.
        . The BTF output pass is enhanced to generate relocation
          records located in .BTF.ext section.
      
      Typical CO-RE also needs support of global variables which can
      be assigned to different values to different hosts. For example,
      kernel version can be used to guard different versions of codes.
      This patch added the support for patchable externals as well.
      
      Example
      =======
      
      The following is an example.
      
        struct pt_regs {
          long arg1;
          long arg2;
        };
        struct sk_buff {
          int i;
          struct net_device *dev;
        };
      
        #define _(x) (__builtin_preserve_access_index(x))
        static int (*bpf_probe_read)(void *dst, int size, const void *unsafe_ptr) =
                (void *) 4;
        extern __attribute__((section(".BPF.patchable_externs"))) unsigned __kernel_version;
        int bpf_prog(struct pt_regs *ctx) {
          struct net_device *dev = 0;
      
          // ctx->arg* does not need bpf_probe_read
          if (__kernel_version >= 41608)
            bpf_probe_read(&dev, sizeof(dev), _(&((struct sk_buff *)ctx->arg1)->dev));
          else
            bpf_probe_read(&dev, sizeof(dev), _(&((struct sk_buff *)ctx->arg2)->dev));
          return dev != 0;
        }
      
      In the above, we want to translate the third argument of
      bpf_probe_read() as relocations.
      
        -bash-4.4$ clang -target bpf -O2 -g -S trace.c
      
      The compiler will generate two new subsections in .BTF.ext,
      OffsetReloc and ExternReloc.
      OffsetReloc is to record the structure member offset operations,
      and ExternalReloc is to record the external globals where
      only u8, u16, u32 and u64 are supported.
      
         BPFOffsetReloc Size
         struct SecLOffsetReloc for ELF section #1
         A number of struct BPFOffsetReloc for ELF section #1
         struct SecOffsetReloc for ELF section #2
         A number of struct BPFOffsetReloc for ELF section #2
         ...
         BPFExternReloc Size
         struct SecExternReloc for ELF section #1
         A number of struct BPFExternReloc for ELF section #1
         struct SecExternReloc for ELF section #2
         A number of struct BPFExternReloc for ELF section #2
      
        struct BPFOffsetReloc {
          uint32_t InsnOffset;    ///< Byte offset in this section
          uint32_t TypeID;        ///< TypeID for the relocation
          uint32_t OffsetNameOff; ///< The string to traverse types
        };
      
        struct BPFExternReloc {
          uint32_t InsnOffset;    ///< Byte offset in this section
          uint32_t ExternNameOff; ///< The string for external variable
        };
      
      Note that only externs with attribute section ".BPF.patchable_externs"
      are considered for Extern Reloc which will be patched by bpf loader
      right before the load.
      
      For the above test case, two offset records and one extern record
      will be generated:
        OffsetReloc records:
              .long   .Ltmp12                 # Insn Offset
              .long   7                       # TypeId
              .long   242                     # Type Decode String
              .long   .Ltmp18                 # Insn Offset
              .long   7                       # TypeId
              .long   242                     # Type Decode String
      
        ExternReloc record:
              .long   .Ltmp5                  # Insn Offset
              .long   165                     # External Variable
      
        In string table:
              .ascii  "0:1"                   # string offset=242
              .ascii  "__kernel_version"      # string offset=165
      
      The default member offset can be calculated as
          the 2nd member offset (0 representing the 1st member) of struct "sk_buff".
      
      The asm code:
          .Ltmp5:
          .Ltmp6:
                  r2 = 0
                  r3 = 41608
          .Ltmp7:
          .Ltmp8:
                  .loc    1 18 9 is_stmt 0        # t.c:18:9
          .Ltmp9:
                  if r3 > r2 goto LBB0_2
          .Ltmp10:
          .Ltmp11:
                  .loc    1 0 9                   # t.c:0:9
          .Ltmp12:
                  r2 = 8
          .Ltmp13:
                  .loc    1 19 66 is_stmt 1       # t.c:19:66
          .Ltmp14:
          .Ltmp15:
                  r3 = *(u64 *)(r1 + 0)
                  goto LBB0_3
          .Ltmp16:
          .Ltmp17:
          LBB0_2:
                  .loc    1 0 66 is_stmt 0        # t.c:0:66
          .Ltmp18:
                  r2 = 8
                  .loc    1 21 66 is_stmt 1       # t.c:21:66
          .Ltmp19:
                  r3 = *(u64 *)(r1 + 8)
          .Ltmp20:
          .Ltmp21:
          LBB0_3:
                  .loc    1 0 66 is_stmt 0        # t.c:0:66
                  r3 += r2
                  r1 = r10
          .Ltmp22:
          .Ltmp23:
          .Ltmp24:
                  r1 += -8
                  r2 = 8
                  call 4
      
      For instruction .Ltmp12 and .Ltmp18, "r2 = 8", the number
      8 is the structure offset based on the current BTF.
      Loader needs to adjust it if it changes on the host.
      
      For instruction .Ltmp5, "r2 = 0", the external variable
      got a default value 0, loader needs to supply an appropriate
      value for the particular host.
      
      Compiling to generate object code and disassemble:
         0000000000000000 bpf_prog:
                 0:       b7 02 00 00 00 00 00 00         r2 = 0
                 1:       7b 2a f8 ff 00 00 00 00         *(u64 *)(r10 - 8) = r2
                 2:       b7 02 00 00 00 00 00 00         r2 = 0
                 3:       b7 03 00 00 88 a2 00 00         r3 = 41608
                 4:       2d 23 03 00 00 00 00 00         if r3 > r2 goto +3 <LBB0_2>
                 5:       b7 02 00 00 08 00 00 00         r2 = 8
                 6:       79 13 00 00 00 00 00 00         r3 = *(u64 *)(r1 + 0)
                 7:       05 00 02 00 00 00 00 00         goto +2 <LBB0_3>
      
          0000000000000040 LBB0_2:
                 8:       b7 02 00 00 08 00 00 00         r2 = 8
                 9:       79 13 08 00 00 00 00 00         r3 = *(u64 *)(r1 + 8)
      
          0000000000000050 LBB0_3:
                10:       0f 23 00 00 00 00 00 00         r3 += r2
                11:       bf a1 00 00 00 00 00 00         r1 = r10
                12:       07 01 00 00 f8 ff ff ff         r1 += -8
                13:       b7 02 00 00 08 00 00 00         r2 = 8
                14:       85 00 00 00 04 00 00 00         call 4
      
      Instructions #2, #5 and #8 need relocation resoutions from the loader.
      
      Signed-off-by: default avatarYonghong Song <yhs@fb.com>
      
      Differential Revision: https://reviews.llvm.org/D61524
      
      llvm-svn: 365503
      d3d88d08
    • Simon Pilgrim's avatar
      [ADT] Remove MSVC-only "no two-phase name lookup" typename path. · d050e456
      Simon Pilgrim authored
      Now that we've dropped VS2015 support (D64326) we can use the regular codepath as VS2017+ correctly handles it
      
      llvm-svn: 365502
      d050e456
    • David Bolvansky's avatar
      [NFC] Added tests for D64285 · e625eb9d
      David Bolvansky authored
      llvm-svn: 365501
      e625eb9d
    • Marco Antognini's avatar
      [OpenCL][Sema] Improve address space support for blocks · d36e130a
      Marco Antognini authored
      Summary:
      This patch ensures that the following code is compiled identically with
      -cl-std=CL2.0 and -fblocks -cl-std=c++.
      
          kernel void test(void) {
            void (^const block_A)(void) = ^{
              return;
            };
          }
      
      A new test is not added because cl20-device-side-enqueue.cl will cover
      this once blocks are further improved for C++ for OpenCL.
      
      The changes to Sema::PerformImplicitConversion are based on
      the parts of Sema::CheckAssignmentConstraints on block pointer
      conversions.
      
      Reviewers: rjmccall, Anastasia
      
      Subscribers: yaxunl, cfe-commits
      
      Tags: #clang
      
      Differential Revision: https://reviews.llvm.org/D64083
      
      llvm-svn: 365500
      d36e130a
    • Marco Antognini's avatar
      [OpenCL][Sema] Fix builtin rewriting · b00d5f73
      Marco Antognini authored
      This patch ensures built-in functions are rewritten using the proper
      parent declaration.
      
      Existing tests are modified to run in C++ mode to ensure the
      functionality works also with C++ for OpenCL while not increasing the
      testing runtime.
      
      llvm-svn: 365499
      b00d5f73
    • Aaron Ballman's avatar
      Ignore trailing NullStmts in StmtExprs for GCC compatibility. · b1e511bf
      Aaron Ballman authored
      Ignore trailing NullStmts in compound expressions when determining the result type and value. This is to match the GCC behavior which ignores semicolons at the end of compound expressions.
      
      Patch by Dominic Ferreira.
      
      llvm-svn: 365498
      b1e511bf
    • Chen Zheng's avatar
      d9555730
    • David Green's avatar
      [ARM] Add test for MVE and no floats. NFC · 781e3aff
      David Green authored
      Adds a simple test that MVE with no floating point will be promoted correctly
      to software float calls.
      
      llvm-svn: 365496
      781e3aff
    • Sanjay Patel's avatar
      [InferFunctionAttrs] add more tests for derefenceable; NFC · fb453353
      Sanjay Patel authored
      llvm-svn: 365495
      fb453353
    • Petar Avramovic's avatar
      [MIPS GlobalISel] Register bank select for G_PHI. Select i64 phi · be20e361
      Petar Avramovic authored
      Select gprb or fprb when def/use register operand of G_PHI is
      used/defined by either:
       copy to/from physical register or
       instruction with only one mapping available for that use/def operand.
      
      Integer s64 phi is handled with narrowScalar when mapping is applied,
      produced artifacts are combined away. Manually set gprb to all register
      operands of instructions created during narrowScalar.
      
      Differential Revision: https://reviews.llvm.org/D64351
      
      llvm-svn: 365494
      be20e361
    • Matt Arsenault's avatar
      AMDGPU/GlobalISel: Prepare some tests for store selection · fdd761af
      Matt Arsenault authored
      Mostsly these would fail due to trying to use SI with a flat
      operation. Implementing global loads with MUBUF is more work than
      flat, so these won't be handled in the initial load selection.
      
      Others fail because store of s64 won't initially work, as the current
      set of patterns expect everything to be turned into v2i32.
      
      llvm-svn: 365493
      fdd761af
    • Petar Avramovic's avatar
      [MIPS GlobalISel] Regbanks for G_SELECT. Select i64, f32 and f64 select · dbb6d01d
      Petar Avramovic authored
      Select gprb or fprb when def/use register operand of G_SELECT is
      used/defined by either:
       copy to/from physical register or
       instruction with only one mapping available for that use/def operand.
      
      Integer s64 select is handled with narrowScalar when mapping is applied,
      produced artifacts are combined away. Manually set gprb to all register
      operands of instructions created during narrowScalar.
      
      For selection of floating point s32 or s64 select it is enough to set
      fprb of appropriate size and selectImpl will do the rest.
      
      Differential Revision: https://reviews.llvm.org/D64350
      
      llvm-svn: 365492
      dbb6d01d
    • Matt Arsenault's avatar
      AMDGPU/GlobalISel: Fix test · 85ad662d
      Matt Arsenault authored
      llvm-svn: 365491
      85ad662d
    • Emilio Cobos Alvarez's avatar
      [libclang] Fix hang in release / assertion in debug when evaluating value-dependent types. · 74375450
      Emilio Cobos Alvarez authored
      Expression evaluator doesn't work in value-dependent types, so ensure that the
      precondition it asserts holds.
      
      This fixes https://bugs.llvm.org/show_bug.cgi?id=42532
      
      Differential Revision: https://reviews.llvm.org/D64409
      
      llvm-svn: 365490
      74375450
    • James Henderson's avatar
      [docs][llvm-dwarfdump] Fix wording · e0a3ee79
      James Henderson authored
      llvm-svn: 365489
      e0a3ee79
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