Commits · 287177a47a396ca6cc0bef7696108cdaa0c68e5f · Lorenzo Albano / LLVM bpEVL · GitLab

Mar 13, 2023
- [memprof] Record BuildIDs in the raw profile. · 287177a4
  Snehasish Kumar authored Feb 28, 2023
  287177a4
- [AArch64][SVE]: custom lower AVGFloor/AVGCeil. · 40a51e1a
  Hassnaa Hamdi authored Feb 23, 2023
  40a51e1a
- [RISCV] Extend SK_Broadcast costing to scalable vectors · 64fc41ad
  Philip Reames authored Mar 13, 2023
  64fc41ad
- [GVNHoist] don't hoist callbr users into the callbr's block · 831e99fe
  Nick Desaulniers authored Mar 13, 2023
  831e99fe
- [RISCV] Fallback to scalable lowering costs for fixed length vectors · a37dfbb7
  Philip Reames authored Mar 13, 2023
  a37dfbb7
- [SCEV] Apply loop guards against min/max for its arguments · b6075837
  Dmitry Makogon authored Mar 07, 2023
  b6075837
- Revert "[LowerTypeTests] Avoid creation of select constant expression" · 528c53ee
  Zequan Wu authored Mar 13, 2023
  528c53ee
- [BPF] Improve pruning to avoid generate more types in BTF · db3d2ade
  Yonghong Song authored Mar 09, 2023
  db3d2ade
- [X86] Use llvm::Align for passing the alignment · 7ff0b973
  Phoebe Wang authored Mar 13, 2023
  7ff0b973
- [AArch64] Cost-model vector splat LD1Rs to avoid unprofitable SLP vectorisation · 775451b6
  Sjoerd Meijer authored Mar 13, 2023
  775451b6
- [MachineCombiner] Preserve debug instruction number · 6e861d81
  Felipe de Azevedo Piovezan authored Mar 09, 2023
  6e861d81
- [SVE] Restrict cmp+and->pred_cmp isel to instances where the and is the sole user of the compare. · 38708572
  Paul Walker authored Mar 02, 2023
  38708572
- [DWARFLinker][DWARFv5] Add support for DW_FORM_addrx* · b86b709b
  Alexey Lapshin authored Mar 09, 2023
  b86b709b
- [IPSCCP] Don't add !range metadata for vector returns · e0282cb4
  Nikita Popov authored Mar 13, 2023
  e0282cb4
- [X86] Pre-commit test for #61271 · afdcf219
  Phoebe Wang authored Mar 13, 2023
  
  afdcf219
- Return "[LICM] Support logical AND/OR when hoisting min/max" · f91aaf1b
  Max Kazantsev authored Mar 13, 2023
  f91aaf1b
- [LICM] Do not hoist min/max for pointer types · fc128e12
  Max Kazantsev authored Mar 13, 2023
  fc128e12
- Recommit "[RISCV] Add separate lookup tables for fli.h and fli.d." · bf4b9857
  Craig Topper authored Mar 12, 2023
  bf4b9857
- Revert "[RISCV] Add separate lookup tables for fli.h and fli.d." · ffc18c33
  Craig Topper authored Mar 12, 2023
  ffc18c33
- Reland rGf35a09daebd0a90daa536432e62a2476f708150d and rG63854f91d3ee1056796a5ef27753648396cac6ec · 4f0ed16a
  Chen Zheng authored Dec 09, 2022
  4f0ed16a
- [SelectionDAG] Fix mismatched truncate when combine BUILD_VECTOR with EXTRACT_SUBVECTOR · 00eef4f7
  Jun Ma authored Mar 10, 2023
  00eef4f7
Mar 12, 2023
- [InstCombine] Precommit tests · 7946e67c
  Kazu Hirata authored Mar 12, 2023
  7946e67c
- [RISCV] Add separate lookup tables for fli.h and fli.d. · ebc11b68
  Craig Topper authored Mar 12, 2023
  ebc11b68
- [RISCV] Add test cases for fli.h and fli.d CodeGen bugs. NFC · 858451c5
  Craig Topper authored Mar 12, 2023
  858451c5
- [AMDGPU] Regenerate sdwa-peephole.ll · f759275c
  Simon Pilgrim authored Mar 12, 2023
  
  f759275c
- [amdgpu][nfc] Replace ad hoc LDS frame recalculation with absolute_symbol MD · d3dda422
  Jon Chesterfield authored Mar 12, 2023
  d3dda422
- [DAG] visitAND - fold (and (any_ext V), c) -> (zero_ext (and (trunc V), c)) if profitable. · b53ea2b9
  Simon Pilgrim authored Mar 12, 2023
  b53ea2b9
- [X86] and-shift.ll - add gnux32 test coverage to ensure the X32 ABI correctly... · 84547ec4
  Simon Pilgrim authored Mar 12, 2023
  84547ec4
- [InstCombine] Extend SVEVectorFuseMulAddSub to support newly added "undef" intrinsics. · 2f887c9a
  Paul Walker authored Feb 20, 2023
  2f887c9a
- [X86] matchAddressRecursively - support zext(and(shl(x,c1)),c2) -> shl(zext(and(x, c2 >> c1),c1) · 47208f8d
  Simon Pilgrim authored Mar 12, 2023
  47208f8d
- Revert "[SPARC] Lower BR_CC to BPr on 64-bit target whenever possible" · eee590ca
  Brad Smith authored Mar 12, 2023
  eee590ca
Mar 11, 2023
- [SPARC] Lower BR_CC to BPr on 64-bit target whenever possible · 6590a372
  Koakuma authored Mar 11, 2023
  6590a372
- [SPARC] Implement hooks for conditional branch relaxation · 24e30019
  Koakuma authored Mar 11, 2023
  24e30019
- Revert "[InstCombine] use loop info when running the pass after loop vectorization" · ef6f2353
  Sanjay Patel authored Mar 11, 2023
  ef6f2353
- [InstCombine] use loop info when running the pass after loop vectorization · 43ae4b62
  Sanjay Patel authored Mar 11, 2023
  43ae4b62
- [X86] Add tests showing the failure to merge SHL/ADD through AND masks into LEA · 772aa054
  Simon Pilgrim authored Mar 11, 2023
  
  772aa054
- [DAG] combineShiftAnd1ToBitTest - improve support for peeking through truncations · fad852ef
  Simon Pilgrim authored Mar 11, 2023
  fad852ef
- [DAG] Add test showing combineShiftAnd1ToBitTest failing to peek through a truncation · e554cec4
  Simon Pilgrim authored Mar 11, 2023
  
  e554cec4
- [test] Add some interesting cases to MC/RISCV/riscv64-64b-pcrel.s · c598828b
  Fangrui Song authored Mar 10, 2023
  
  c598828b
- [X86] Add unwind for base pointer test case. · 91f71539
  Luo, Yuanke authored Mar 11, 2023
  
  91f71539