Commits · 37e8f2d6a74517edcf1a841a15c937f5a0d5131d · Lorenzo Albano / LLVM bpEVL · GitLab

Jan 05, 2015
- [PowerPC] Remove zexts after i32 ctlz · 49557f1b
  Hal Finkel authored Jan 05, 2015
  49557f1b
- [PowerPC] Remove zexts after byte-swapping loads · 4e2c7822
  Hal Finkel authored Jan 05, 2015
  4e2c7822
- [Hexagon] Adding round reg/imm and bitsplit instructions. · 5e079577
  Colin LeMahieu authored Jan 05, 2015
  5e079577
- SymbolRewriter: use iplist::splice · 150a1dc5
  Saleem Abdulrasool authored Jan 05, 2015
  150a1dc5
- SymbolRewriter: 80-column · d37ce308
  Saleem Abdulrasool authored Jan 05, 2015
  d37ce308
- [AArch64] Improve codegen of store lane instructions by avoiding GPR usage. · d54c448d
  Ahmed Bougacha authored Jan 05, 2015
  d54c448d
- [AArch64] Improve codegen of store lane 0 instructions by directly storing the subregister. · f964df36
  Ahmed Bougacha authored Jan 05, 2015
  f964df36
- Select lower fsub,fabs pattern to fabd on AArch64 · 93f27ce8
  Karthik Bhat authored Jan 05, 2015
  93f27ce8
- Parse Tag_compatibility correctly. · 6632d1f6
  Charlie Turner authored Jan 05, 2015
  6632d1f6
- Emit the build attribute Tag_conformance. · 8b2caa45
  Charlie Turner authored Jan 05, 2015
  8b2caa45
- Select lower sub,abs pattern to sabd on AArch64 · 8ec742c2
  Karthik Bhat authored Jan 05, 2015
  8ec742c2
- [PM] Don't run the machinery of invalidating all the analysis passes · 539dc4b9
  Chandler Carruth authored Jan 05, 2015
  539dc4b9
- [PM] Add names and debug logging for analysis passes to the new pass · e5e8fb3b
  Chandler Carruth authored Jan 05, 2015
  e5e8fb3b
- Replace several 'assert(false' with 'llvm_unreachable' or fold a condition into the assert. · d3c02f17
  Craig Topper authored Jan 05, 2015
  d3c02f17
- Fixed a bug in memory dependence checking module of loop vectorization. The... · 40c1b352
  Jiangning Liu authored Jan 05, 2015
  40c1b352
- [X86] Remove the predicates from the register forms of the 2-byte inc and dec... · dc2fc803
  Craig Topper authored Jan 05, 2015
  dc2fc803
- [X86] Simplify code a little by just summing flags instead of conditionally incrementing. NFC · 3dcdde2e
  Craig Topper authored Jan 05, 2015
  3dcdde2e
- [X86] Remove unnecessary redeclaration of a variable with the same assignment... · 859677ed
  Craig Topper authored Jan 05, 2015
  859677ed
- [X86] Remove a strange fixme referring to a hack that doesn't seem to exist... · 9cf67c6f
  Craig Topper authored Jan 05, 2015
  9cf67c6f
- [x86] Reduce text duplication for similar operand class declarations in... · e9e081cd
  Craig Topper authored Jan 05, 2015
  e9e081cd
- [X86] Fix the immediate size to match the address size in the operand types... · 21f98496
  Craig Topper authored Jan 05, 2015
  21f98496
- [PowerPC] Enable speculation of cttz/ctlz · 9bb61de1
  Hal Finkel authored Jan 05, 2015
  9bb61de1
- [SROA] Apply a somewhat heavy and unpleasant hammer to fix PR22093, an · 73b0164f
  Chandler Carruth authored Jan 05, 2015
  73b0164f
- [PowerPC] Materialize i64 constants using rotation with masking · 2f61879f
  Hal Finkel authored Jan 05, 2015
  2f61879f
- [PM] Switch the new pass manager to use a reference-based API for IR · d174ce4a
  Chandler Carruth authored Jan 05, 2015
  d174ce4a
- [PM] Cleanup a const_cast and other machinery left over in this code · 75c11b88
  Chandler Carruth authored Jan 04, 2015
  75c11b88
Jan 04, 2015
- [PowerPC] Materialize i64 constants using rotation · 241ba79f
  Hal Finkel authored Jan 04, 2015
  241ba79f
- Fix unused variable warning for non-asserts builds. NFC. · 58c3f6cc
  Michael Kuperstein authored Jan 04, 2015
  58c3f6cc
- [PowerPC] Materialize i64 constants using bit inversion · ca6375fb
  Hal Finkel authored Jan 04, 2015
  ca6375fb
- [PM] Split the AssumptionTracker immutable pass into two separate APIs: · 66b3130c
  Chandler Carruth authored Jan 04, 2015
  66b3130c
- InstCombine: match can find ConstantExprs, don't assume we have a Value · 087dc8b8
  David Majnemer authored Jan 04, 2015
  087dc8b8
- ValueTracking: ComputeNumSignBits should tolerate misshapen phi nodes · 6ee8d17b
  David Majnemer authored Jan 04, 2015
  6ee8d17b
- [APFloat][ADT] Fix sign handling logic for FMA results that truncate to zero. · 12b12e80
  Lang Hames authored Jan 04, 2015
  12b12e80
Jan 03, 2015
- ARM: permit tail calls to weak externals on COFF · 67f72993
  Saleem Abdulrasool authored Jan 03, 2015
  67f72993
- [PowerPC/BlockPlacement] Allow target to provide a per-loop alignment preference · 5772566e
  Hal Finkel authored Jan 03, 2015
  5772566e
- [PowerPC] Use 16-byte alignment for modern cores for functions/loops · d73bfba7
  Hal Finkel authored Jan 03, 2015
  d73bfba7
- Minor cleanup to all the switches after MatchInstructionImpl in all the AsmParsers. · 589ceee7
  Craig Topper authored Jan 03, 2015
  589ceee7
- ValueTracking: Make computeKnownBits for Arguments a little more clear · 8df46c92
  David Majnemer authored Jan 03, 2015
  8df46c92
- [PowerPC] Add support for the CMPB instruction · 4edc66b8
  Hal Finkel authored Jan 03, 2015
  4edc66b8
- [asan] simplify the tracing code, make it use the same guard variables as coverage · d421db05
  Kostya Serebryany authored Jan 03, 2015
  d421db05