Commits · 56b2aee1875a1ee47ddf859a6584f8728787fb7b · Lorenzo Albano / LLVM bpEVL · GitLab

Nov 08, 2019
- [AArch64][X86] Don't assume __powidf2 is available on Windows. · 5df3a872
  Eli Friedman authored Oct 31, 2019
  5df3a872
- Reland: [TII] Use optional destination and source pair as a return value; NFC · 8d2ccd1a
  Djordje Todorovic authored Nov 08, 2019
  8d2ccd1a
Nov 06, 2019
- [TTI][LV] preferPredicateOverEpilogue · 6c2a4f5f
  Sjoerd Meijer authored Nov 06, 2019
  6c2a4f5f
- [ARM,MVE] Add intrinsics for gather/scatter load/stores. · 6c3fee47
  Simon Tatham authored Oct 31, 2019
  6c3fee47
Nov 05, 2019
- [globalisel] Rename G_GEP to G_PTR_ADD · e74c5b96
  Daniel Sanders authored Nov 01, 2019
  e74c5b96
- [ARM] Always enable UseAA in the arm backend · cf581d79
  David Green authored Nov 05, 2019
  cf581d79
- [Scheduling][ARM] Consistently enable PostRA Machine scheduling · 7d9af03f
  David Green authored Nov 05, 2019
  7d9af03f
Nov 04, 2019
- Fix static analysis warnings in ARM calling convention lowering · 73c3137a
  Oliver Stannard authored Nov 04, 2019
  73c3137a
- [ARM] Use isFMAFasterThanFMulAndFAdd for MVE · 91b0cad8
  David Green authored Nov 04, 2019
  91b0cad8
- [ARM] Add vrev32 NEON fp16 patterns · 6bae5d16
  David Green authored Nov 04, 2019
  6bae5d16
- [FIX] Removed duplicated v4f16 and v8f16 declarations · 3169f012
  Diogo Sampaio authored Nov 04, 2019
  3169f012
Nov 02, 2019
- A15SDOptimizer::getPrefSPRLane - fix null dereference warning. NFCI · d397e292
  Simon Pilgrim authored Nov 02, 2019
  
  d397e292
Oct 31, 2019
- Revert rG57ee0435bd47f23f3939f402914c231b4f65ca5e - [TII] Use optional... · 3842b94c
  Simon Pilgrim authored Oct 31, 2019
  3842b94c
- [TII] Use optional destination and source pair as a return value; NFC · 57ee0435
  Djordje Todorovic authored Oct 31, 2019
  57ee0435
Oct 30, 2019
- [clang][llvm] Obsolete Exynos M1 and M2 · 215da660
  Evandro Menezes authored Oct 02, 2019
  
  215da660
- [ARM][AArch64][DebugInfo] Improve call site instruction interpretation · 532815dd
  Djordje Todorovic authored Oct 30, 2019
  532815dd
Oct 29, 2019
- Reland [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2) · d6a7da80
  Sander de Smalen authored Oct 29, 2019
  d6a7da80
- Revert rG70f5aecedef9a6e347e425eb5b843bf797b95319 - "Reland... · 2c496bb5
  Simon Pilgrim authored Oct 29, 2019
  2c496bb5
Oct 28, 2019
- [ARM][Thumb2InstrInfo] Fix default `0` opcode when rewriting frame indices · e3a45a24
  David Tellenbach authored Oct 28, 2019
  e3a45a24
- Reland [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2) · 70f5aece
  Sander de Smalen authored Oct 28, 2019
  70f5aece
- Add Windows Control Flow Guard checks (/guard:cf). · d157a9bc
  Andrew Paverd authored Oct 28, 2019
  d157a9bc
- [ARM][AArch64] Implement __cls, __clsl and __clsll intrinsics from ACLE · f6e11a36
  vhscampos authored Oct 17, 2019
  f6e11a36
Oct 25, 2019
- Revert "[ARM] Uses "Sun Style" syntax for section switching" · a6b0219f
  Jian Cai authored Oct 25, 2019
  a6b0219f
- [ARM] Uses "Sun Style" syntax for section switching · 03de2f84
  Jian Cai authored Oct 25, 2019
  03de2f84
- [Alignment][NFC] getMemoryOpCost uses MaybeAlign · a4783ef5
  Guillaume Chatelet authored Oct 22, 2019
  a4783ef5
Oct 24, 2019
- [ARM] Add IR intrinsics for MVE VLD[24] and VST[24]. · e0ef4ebe
  Simon Tatham authored Oct 07, 2019
  e0ef4ebe
- [ARM] Add some sample IR MVE intrinsics with C++ isel. · ceeff95c
  Simon Tatham authored Oct 07, 2019
  ceeff95c
- [ARM] Begin adding IR intrinsics for MVE instructions. · 1b45297e
  Simon Tatham authored Oct 07, 2019
  1b45297e
Oct 23, 2019
- [Mips] Use appropriate private label prefix based on Mips ABI · 4b63ca13
  Mirko Brkusanin authored Oct 23, 2019
  4b63ca13
Oct 21, 2019
- Reverted r375425 as it broke some buildbots. · 8f2dac47
  Sander de Smalen authored Oct 21, 2019
  8f2dac47
- [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2) · 814548ec
  Sander de Smalen authored Oct 21, 2019
  814548ec
- [ARM] Extra qdadd patterns · 0765a4c2
  David Green authored Oct 21, 2019
  0765a4c2
- [ARM] Add qadd lowering from a sadd_sat · d7b77f22
  David Green authored Oct 21, 2019
  d7b77f22
- [Alignment][NFC] TargetCallingConv::setOrigAlign and TargetLowering::getABIAlignmentForCallingConv · bac5f6bd
  Guillaume Chatelet authored Oct 21, 2019
  bac5f6bd
- [ARM] Lower sadd_sat to qadd8 and qadd16 · fba831e7
  David Green authored Oct 21, 2019
  fba831e7
- Use Align for TFL::TransientStackAlignment · 3cc4835c
  Guillaume Chatelet authored Oct 21, 2019
  3cc4835c
Oct 19, 2019
- Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each · 904cd3e0
  Reid Kleckner authored Oct 19, 2019
  904cd3e0
- Prune two MachineInstr.h includes, fix up deps · 1d7b4136
  Reid Kleckner authored Oct 19, 2019
  1d7b4136
Oct 18, 2019
- [GISel][CallLowering] Make isIncomingArgumentHandler a pure virtual method · 9f9151d4
  Quentin Colombet authored Oct 18, 2019
  9f9151d4
Oct 17, 2019
- [ARM][MVE] Enable truncating masked stores · 8e6a638c
  Sam Parker authored Oct 17, 2019
  8e6a638c