Implement a localised graph builder for indirect control flow
instructions. Main interface is through GraphBuilder::buildFlowGraph,
which will build a flow graph around an indirect CF instruction. Various
modifications to FileVerifier are also made to const-expose some members
needed for machine code analysis done by the graph builder.

Reviewers: vlad.tsyrklevich

Reviewed By: vlad.tsyrklevich

Subscribers: llvm-commits, kcc, pcc

Differential Revision: https://reviews.llvm.org/D38427

llvm-svn: 316372

Revert commit r316366.
Previous commit causes p8-scalar_vector_conversions.ll to fail.

This reverts commit 990e764ad8a2eec206ce5dda6aefab059ccd4e92.

llvm-svn: 316371

Previously, the COFF driver would call exit(0) when called
as a library.  Now it takes `ExitEarly` option, and if it
is false, it doesn't exit.  So it is now more library-friendly.

Furthermore, link() calls freeArena() before returning, to
clean up resources.

Based on an Andrew Kelley's patch.

Differential Revision: https://reviews.llvm.org/D39202

llvm-svn: 316370

Summary:

The elts of ActivePreds which is defined as a SmallPtrSet are copied
into Blocks using std::copy. This makes the resultant order of Blocks
non-deterministic. We cannot simply sort Blocks as they need to match
the corresponding Values. So a better approach is to define ActivePreds
as SmallSetVector.

This fixes the following failures in
http://lab.llvm.org:8011/builders/reverse-iteration:
  LLVM :: Transforms/GVNSink/indirect-call.ll
  LLVM :: Transforms/GVNSink/sink-common-code.ll
  LLVM :: Transforms/GVNSink/struct.ll

Reviewers: dberlin, jmolloy, bkramer, efriedma

Reviewed By: dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39025

llvm-svn: 316369

Summary:
We had a bug where if we had forked (in the ProcessLauncherPosixFork)
while another thread was writing a log message, we would deadlock. This
happened because the fork child inherited the locked log rwmutex, which
would never get unlocked. This meant the child got stuck trying to
disable all log channels.

The bug existed for a while but only started being apparent after
D37930, which started using ThreadLauncher (which uses logging) instead
of std::thread (which does not) for launching TaskPool threads.

The fix is to use pthread_atfork to disable logging in the forked child.

Reviewers: zturner, eugene, clayborg

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D38938

llvm-svn: 316368

In HexagonISelLowering, there is code to handle the case when
a function returns an i1 type. In this case, we need to generate
extra nodes to copy the result from R0 to a predicate register.

The code was returning the wrong value for the chain edge which
caused an assert "Wrong topological sorting" when converting the
instructions to MIs.

This patch fixes the problem by returning the chain for the final
copy.

Patch by Brendon Cahoon.

llvm-svn: 316367

If we have the situation where a Swap feeds a Splat we can sometimes change the
index on the Splat and then remove the Swap instruction.

Differential Revision: https://reviews.llvm.org/D39009

llvm-svn: 316366

This fixes gcc warning.

Change by Brian Sumner

llvm-svn: 316365

This requires _WIN32_WINNT >= 0x0600.

If someone wants to spend effort on supporting earlier versions,
one can easily add another fallback implementation based on
critical sections, or try to load SRW lock functions dynamically.

This makes sure that the FDE cache is thread safe on windows.

Differential Revision: https://reviews.llvm.org/D38704

llvm-svn: 316364

One combination was missing: add(add(x,y),c).

llvm-svn: 316363

In some cases the compiler can deduce the length of an array section
as constants. With this information, VLAs can be avoided in place of
a constant sized array or even a scalar value if the length is 1.
Example:
int a[4], b[2];
pragma omp parallel reduction(+: a[1:2], b[1:1])
{ }

For chained array sections, this optimization is restricted to cases
where all array sections except the last have a constant length 1.
This trivially guarantees that there are no holes in the memory region
that needs to be privatized.
Example:
int c[3][4];
pragma omp parallel reduction(+: c[1:1][1:2])
{ }

This relands commit r316229 that I reverted in r316235 because it
failed on some bots. During investigation I found that this was because
Clang and GCC evaluate the two arguments to emplace_back() in
ReductionCodeGen::emitSharedLValue() in a different order, hence
leading to a different order of generated instructions in the final
LLVM IR. Fix this by passing in the arguments from temporary variables
that are evaluated in a defined order.

Differential Revision: https://reviews.llvm.org/D39136

llvm-svn: 316362

Looks like GCC didn't like the original specialization, try within namespace.

llvm-svn: 316361

[globalisel][tablegen] Import stores and allow GISel to automatically substitute zero regs like WZR/XZR/$zero.

This patch enables the import of stores. Unfortunately, doing so by itself,
loses an optimization where storing 0 to memory makes use of WZR/XZR.

To mitigate this, this patch also introduces a new feature that allows register
operands to nominate a zero register. When this is done, GlobalISel will
substitute (G_CONSTANT 0) with the nominated register automatically. This
is currently configured to only apply to the stores.

Applying it to GPR32/GPR64 register classes in general will be done after
review see (https://reviews.llvm.org/D39150).

llvm-svn: 316360

Accidently merged an incomplete upstream patch in 10e6ee563a6b5ca498f27972ca6dbe6c308f1ac2 - reverting the changes.

llvm-svn: 316359

llvm-svn: 316358

A wasm file crafted with a bogus section size can trigger an ASan issue
in the DWARFObjInMemory constructor. Nip the problem in the bud when we
read the wasm section.

Found by OSS-Fuzz:
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=3219

Differential Revision: https://reviews.llvm.org/D38777

llvm-svn: 316357

Summary: .

Reviewers: cryptoad

Subscribers: llvm-commits, kubamracek

Differential Revision: https://reviews.llvm.org/D39131

llvm-svn: 316356

llvm-svn: 316355

llvm-svn: 316354

Differential Revision: https://reviews.llvm.org/D39184

llvm-svn: 316353

Reviewers: pcc, asl, tonic

Reviewed By: pcc

Subscribers: llvm-commits, kcc

Differential Revision: https://reviews.llvm.org/D38516

llvm-svn: 316352

llvm-svn: 316351

Also added links to the talks available.

llvm-svn: 316350

llvm-svn: 316349

Breaks build:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/4677/steps/build%20with%20ninja/logs/stdio

In file included from compiler-rt/lib/xray/xray_fdr_logging.cc:34:
In file included from compiler-rt/lib/xray/xray_fdr_logging_impl.h:36:
In file included from compiler-rt/lib/xray/xray_flags.h:18:
compiler-rt/lib/xray/../sanitizer_common/sanitizer_flag_parser.h:23:7: error: '__sanitizer::FlagHandlerBase' has virtual functions but non-virtual destructor [-Werror,-Wnon-virtual-dtor]
class FlagHandlerBase {

llvm-svn: 316348

Summary:
Purging allocator quarantine and returning memory to OS might be desired
between fuzzer iterations since, most likely, the quarantine is not
going to catch bugs in the code under fuzz, but reducing RSS might
significantly prolong the fuzzing session.

Reviewers: cryptoad

Subscribers: kubamracek, llvm-commits

Differential Revision: https://reviews.llvm.org/D39153

llvm-svn: 316347

The range should be assumed to be the hardware maximum
if a workitem intrinsic is used in a callable function
which does not know the restricted limit of the calling
kernel.

llvm-svn: 316346

[X86] Fix disassembler table generation to prevent instructions tagged with 'PS' being inherited into PD/XS/XD attribute entries.

llvm-svn: 316345

llvm-svn: 316344

llvm-svn: 316343

Summary:
Up to now, the Scudo cmake target only provided a static library that had to be
linked to an executable to benefit from the hardened allocator.
This introduces a shared library as well, that can be LD_PRELOAD'ed.

Reviewers: alekseyshl

Reviewed By: alekseyshl

Subscribers: srhines, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D38980

llvm-svn: 316342

Rename endIdx, startIdx, and length to getEndIdx, getStartIdx, and getLength
in Candidate.

llvm-svn: 316341

llvm-svn: 316340

Should be no functional change for now. A future disassembler change will prevent disassembling with 0xf2/0xf3.

llvm-svn: 316339

Preparing to do a refactor of CPU/feature checking, this
patch pulls the one CPU implementation from the .h file
to the .cpp file.

llvm-svn: 316338

I don't think this changes anything functionally yet, but I plan to fix the disassembler to use this to disable matching certain instructions with 0xf3/0xf2/0x66 prefixes.

llvm-svn: 316337

Remove AssertZext and instead add PEXTRW/PEXTRB support to computeKnownBitsForTargetNode to simplify instruction selection.

Differential Revision: https://reviews.llvm.org/D39169

llvm-svn: 316336

This is for consistency with lld-link, see https://reviews.llvm.org/D38972
Also give --version a help text so it shows up in --help / /? output (for
both clang-cl and regular clang).

llvm-svn: 316335

Differential Revision: https://reviews.llvm.org/D39046

llvm-svn: 316334

llvm-svn: 316333