Commits · a2a7fc7ea5612fd86c46f054690f532092d92a3d · Lorenzo Albano / LLVM bpEVL · GitLab

Feb 01, 2022
- [RISCV] Adjust some comments. · a2a7fc7e
  Shao-Ce SUN authored Feb 01, 2022
  
  a2a7fc7e
- [clangd] Group and extend release notes · e9cba786
  Sam McCall authored Feb 01, 2022
  
  e9cba786
- [GlobalStatus] Skip non-pointer dead constant users · 236fbf57
  Nikita Popov authored Feb 01, 2022
  236fbf57
- [AArch64] Add signed version of uaddlv test. NFC · d9b4577c
  David Green authored Feb 01, 2022
  
  d9b4577c
- [PowerPC] Update P10 vector insert patterns to use refactored load/stores, and... · 0d6e6475
  Amy Kwan authored Jan 28, 2022
  0d6e6475
- [flang] Add lowering for basic empty SUBROUTINE · 89275300
  Valentin Clement authored Feb 01, 2022
  89275300
- [AArch64] Do not use ABI alignment for mops.memset.tag · a1dc6d4b
  Nikita Popov authored Feb 01, 2022
  a1dc6d4b
- [lldb] Convert ProcessGDBRemoteLog to the new API · b1127753
  Pavel Labath authored Jan 28, 2022
  
  b1127753
- [clangd] Cleanup of readability-identifier-naming · 8edfc2f8
  Christian Kühnel authored Feb 01, 2022
  8edfc2f8
- [demangler] Preserve line numbering in copied demangler sources · fa7834a5
  Nathan Sidwell authored Jan 24, 2022
  fa7834a5
- [clang-format] Use std::iota and reserve when sorting Java imports. NFC. · af8f1dbb
  Marek Kurdej authored Feb 01, 2022
  af8f1dbb
- [clang-format] Use std::iota and reserve. NFC. · e75a3428
  Marek Kurdej authored Feb 01, 2022
  e75a3428
- [clang-format] De-pessimize appending newlines. NFC. · 34b4f006
  Marek Kurdej authored Feb 01, 2022
  34b4f006
- [clang-format] Use ranged for loops. NFC. · 545317cb
  Marek Kurdej authored Feb 01, 2022
  
  545317cb
- [openmp] Disable tests that presently hang on CI · 8b7e99c4
  Jon Chesterfield authored Feb 01, 2022
  
  8b7e99c4
- [mlir][vector][integration] Reactivate LLI in vector integration test. · 31b7f885
  Nicolas Vasilache authored Feb 01, 2022
  31b7f885
- [flang] Add lowering placeholders · 99075913
  Valentin Clement authored Feb 01, 2022
  99075913
- [DAG] SimplifyMultipleUseDemandedBits - add default Depth = 0 argument. · 904395ab
  Simon Pilgrim authored Feb 01, 2022
  904395ab
- Temporarily disable LLI to investigate weird non 0 error code · c2fa5ff5
  Nicolas Vasilache authored Feb 01, 2022
  c2fa5ff5
- [gn build] unconfuse sync script after 762f0b54 · 93dc66a0
  Nico Weber authored Feb 01, 2022
  
  93dc66a0
- [CodeGen][AArch64] Fix typo in legalizer-info-validation.mir · d0307622
  Alexander Shaposhnikov authored Feb 01, 2022
  
  d0307622
- [CodeGen][AArch64] Fix typo in arm64-zero-cycle-zeroing.ll · 80c27fbf
  Alexander Shaposhnikov authored Feb 01, 2022
  
  80c27fbf
- [llvm-objcopy][COFF] Add missing RUN in bigobj.test · 3f537223
  Alexander Shaposhnikov authored Feb 01, 2022
  
  3f537223
- [lld][MachO] Fix typo in rename.s · 7244901e
  Alexander Shaposhnikov authored Feb 01, 2022
  
  7244901e
- [DAG] Make it clear mul(x,x) knownbits bit[1] == 0 check should be for x is undef only · d83a96f5
  Simon Pilgrim authored Feb 01, 2022
  d83a96f5
- [lld][ELF] Add missing RUN in aarch64-adrp-ldr-got.s · f131d4d0
  Alexander Shaposhnikov authored Feb 01, 2022
  
  f131d4d0
- [RISCV][3/3] Switch undef -> poison in scalable-vector RVV tests · e9ceeedf
  Fraser Cormack authored Feb 01, 2022
  
  e9ceeedf
- [RISCV][2/3] Switch undef -> poison in fixed-vector RVV tests · 8d1169cf
  Fraser Cormack authored Feb 01, 2022
  
  8d1169cf
- [RISCV][1/3] Switch undef -> poison in VP RVV tests · 414f21ed
  Fraser Cormack authored Feb 01, 2022
  414f21ed
- [mlir] Attempt working around a GCC 5 bug · a0ea7339
  Benjamin Kramer authored Feb 01, 2022
  a0ea7339
- [mlir][LLVM] Add support for operand_attrs to InlineAsmOp · 42398b51
  Nicolas Vasilache authored Jan 26, 2022
  42398b51
- [AArch64] Regenerate test checks (NFC) · ccda3d4e
  Nikita Popov authored Feb 01, 2022
  ccda3d4e
- [MLIR] Extract division representation from equality expressions. · 1e7c464d
  Prashant Kumar authored Jan 23, 2022
  1e7c464d
- Revert "[SLP]Alternate vectorization for cmp instructions." · 5281f0da
  Benjamin Kramer authored Feb 01, 2022
  5281f0da
- [ARM] Make getInstSizeInBytes() use instruction size from InstrInfo.td · 762f0b54
  tyb0807 authored Jan 23, 2022
  762f0b54
- [AArch64] Make getInstSizeInBytes() use instruction size from InstrInfo.td · dd88f40c
  tyb0807 authored Jan 22, 2022
  dd88f40c
- [RISCV] Add a test showing an incorrect VSETVLI insertion · b00bce2a
  Fraser Cormack authored Jan 31, 2022
  b00bce2a
- [compiler-rt][fuzzer] Disable 2 tests for Arm Thumb builds · df3d121b
  David Spickett authored Feb 01, 2022
  df3d121b
- [DAGCombine] Add simple folds for SSHLSAT/USHLSAT · 38858790
  Bjorn Pettersson authored Jan 28, 2022
  38858790
- Pre-commit test cases missing SSHLSAT/USHLSAT folds. NFC · 06105f2e
  Bjorn Pettersson authored Jan 31, 2022
  
  06105f2e