llvm-svn: 250059

Differential Revision: http://reviews.llvm.org/D12798

llvm-svn: 250058

llvm-svn: 250057

On targets where f32 is not legal, we have to look through a BITCAST SDNode to
find the register that an argument is stored in when emitting debug info, or we
will not be able to emit a DW_AT_location for it.

Differential Revision: http://reviews.llvm.org/D13005

llvm-svn: 250056

llvm-svn: 250055

llvm-svn: 250054

llvm-svn: 250053

Functions in this test case need to be renamed as its names are the same
as the instructions we are comparing with.

llvm-svn: 250052

llvm-svn: 250051

llvm-svn: 250050

llvm-svn: 250049

llvm-svn: 250048

llvm-svn: 250047

On Windows, fs::rename() could fail is another process was reading the
file at the same time using fs::openFileForRead().  In most cases the user
wouldn't notice as fs::rename() will continue to retry for 2000ms.  Typically
this is enough for the read to complete and a retry to succeed, but if the
disk is being it too hard then the response time might be longer than the
retry time and the rename would fail with a permission error.

Add FILE_SHARE_DELETE to the sharing flags for CreateFileW() in
fs::openFileForRead() and try ReplaceFileW() prior to MoveFileExW()
in fs::rename().

Based on an initial patch by Edd Dawson!

Differential Revision: http://reviews.llvm.org/D13647

llvm-svn: 250046

llvm-svn: 250045

This prevents a "too many files" error.

Differential Revision: http://reviews.llvm.org/D13555

llvm-svn: 250044

llvm-svn: 250043

Summary: Fixes PR24915.

Reviewers: vkalintiris

Subscribers: emaste, seanbruno, llvm-commits

Differential Revision: http://reviews.llvm.org/D13533

llvm-svn: 250042

Mostly tabs -> spaces and double spacing.

llvm-svn: 250041

Reviewers: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D13591

llvm-svn: 250040

Summary:
This removes unnecessary instructions when extracting from an undefined register
and also fixes a crash for O32 when passing undef to a double argument in
held in integer registers.

Reviewers: vkalintiris

Subscribers: llvm-commits, zoran.jovanovic, petarj

Differential Revision: http://reviews.llvm.org/D13467

llvm-svn: 250039

Summary:
Test decorators were ignoring AttributeError exceptions. These were introduced three years ago,
and copied to all decorators. They seem to serve no purpose and removing them produces no errors.
Given that they have prevented us from noticing the problem in r249819, I am removing them.

Reviewers: zturner, tfiala

Subscribers: iancottrell, lldb-commits

Differential Revision: http://reviews.llvm.org/D13583

llvm-svn: 250038

llvm-svn: 250037

Actually the only special path we have to handle is ./foo, the rest is
tricky to get right so do the same thing as the existing YAML vfs here.

llvm-svn: 250036

GlobalOpt currently merges stores into the initialisers of internal,
externally_initialized globals, but should not do so as the value of the global
may change between the initialiser and any code in the module being run.

llvm-svn: 250035

Patch by Tobias Langner.

llvm-svn: 250034

The Swift Machine Scheduler Model is incomplete. There are instructions
missing which can trigger the "incomplete machine model" abort. This was
observed when a downstream SchedMachineModel was added to the ARM
target.

Patch by Christof Douma!

llvm-svn: 250033

C semantics force sub-int-sized values (e.g. i8, i16) to be promoted to int
type (e.g. i32) whenever arithmetic is performed on them.

For targets with native i8 or i16 operations, usually InstCombine can shrink
the arithmetic type down again. However InstCombine refuses to create illegal
types, so for targets without i8 or i16 registers, the lengthening and
shrinking remains.

Most SIMD ISAs (e.g. NEON) however support vectors of i8 or i16 even when
their scalar equivalents do not, so during vectorization it is important to
remove these lengthens and truncates when deciding the profitability of
vectorization.

The algorithm this uses starts at truncs and icmps, trawling their use-def
chains until they terminate or instructions outside the loop are found (or
unsafe instructions like inttoptr casts are found). If the use-def chains
starting from different root instructions (truncs/icmps) meet, they are
unioned. The demanded bits of each node in the graph are ORed together to form
an overall mask of the demanded bits in the entire graph. The minimum bitwidth
that graph can be truncated to is the bitwidth minus the number of leading
zeroes in the overall mask.

The intention is that this algorithm should "first do no harm", so it will
never insert extra cast instructions. This is why the use-def graphs are
unioned, so that subgraphs with different minimum bitwidths do not need casts
inserted between them.

This algorithm works hard to reduce compile time impact. DemandedBits are only
queried if there are extends of illegal types and if a truncate to an illegal
type is seen. In the general case, this results in a simple linear scan of the
instructions in the loop.

No non-noise compile time impact was seen on a clang bootstrap build.

llvm-svn: 250032

llvm-svn: 250031

llvm-svn: 250030

Add intrinsics for the
  XSAVE instructions (XSAVE/XSAVE64/XRSTOR/XRSTOR64)
  XSAVEOPT instructions (XSAVEOPT/XSAVEOPT64)
  XSAVEC instructions (XSAVEC/XSAVEC64)
  XSAVES instructions (XSAVES/XSAVES64/XRSTORS/XRSTORS64)

Differential Revision: http://reviews.llvm.org/D13012

llvm-svn: 250029

llvm-svn: 250028

[x86] PR24562: fix incorrect folding of PSHUFB nodes with a mask where all indices have the most significant bit set.

This patch fixes a problem in function 'combineX86ShuffleChain' that causes a
chain of shuffles to be wrongly folded away when the combined shuffle mask has
only one element.

We may end up with a combined shuffle mask of one element as a result of
multiple calls to function 'canWidenShuffleElements()'.
Function canWidenShuffleElements attempts to simplify a shuffle mask by widening
the size of the elements being shuffled.
For every pair of shuffle indices, function canWidenShuffleElements checks if
indices refer to adjacent elements. If all pairs refer to "adjacent" elements
then the shuffle mask is safely widened. As a consequence of widening, we end up
with a new shuffle mask which is half the size of the original shuffle mask.

The byte shuffle (pshufb) from test pr24562.ll has a mask of all SM_SentinelZero
indices. Function canWidenShuffleElements would combine each pair of
SM_SentinelZero indices into a single SM_SentinelZero index. So, in a
logarithmic number of steps (4 in this case), the pshufb mask is simplified to
a mask with only one index which is equal to SM_SentinelZero.

Before this patch, function combineX86ShuffleChain wrongly assumed that a mask
of size one is always equivalent to an identity mask. So, the entire shuffle
chain was just folded away as the combined shuffle mask was treated as a no-op
mask.

With this patch we know check if the only element of a combined shuffle mask is
SM_SentinelZero. In case, we propagate a zero vector.

Differential Revision: http://reviews.llvm.org/D13364

llvm-svn: 250027

llvm-svn: 250026

Summary: Unnecessary space at the beginning of LLVM_DEFINITIONS in cmake shared files can break projects that use the variable.

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D13432

llvm-svn: 250025

* XFAIL it for android arm/aarch64 as watchpoints aren't supported there
* Remove the dwarf/dsym test separation as they will be generated automatically

llvm-svn: 250024

New instructions using floating point registers have been added, to check
that AsmParser can deal with fp regs in vector instructions.

This tests r249810.

llvm-svn: 250023

Summary:
 - Changed from 16 bits to 8 bits for Intel Architecture
    -- FXSAVE structure now conforms with the layout of FXSAVE
       area specified by IA Architecture Software Developer Manual

 - Modified Linux and FreeBSD specific files to support this change
    -- MacOSX already uses 8 bits for ftag register

 - Modified TestRegisters.py and a.cpp:
    -- Change allows 8 bit comparison of ftag values

    -- Change resolves Bug 24733:
       Removed XFAIL for Clang as the test works and passes for
       Clang compiler as well

    -- Change provides a Generic/Better way of testing Bug 24457
       and Bug 25050 by using 'int3' inline assembly in inferior

Signed-off-by: Abhishek Aggarwal <abhishek.a.aggarwal@intel.com>

Reviewers: ovyalov, jingham, clayborg

Subscribers: tfiala, emaste

Differential Revision: http://reviews.llvm.org/D13587

llvm-svn: 250022

This can fail badly if we're overlaying a real file system and there are
symlinks there. Just keep the path as-is for now.

This essentially reverts r249830.

llvm-svn: 250021

This script prints a CSV of all misched models of a target when given the output of the debug output of subtarget using:

    llvm-tblgen --gen-subtarget --debug-only=subtarget-emitter ...

With thanks to Dave Estes for mentioning the idea at the 2014 LLVM Developers' Meeting.

Patch by Christof Douma!

llvm-svn: 250020