Differential Revision: https://reviews.llvm.org/D37981

llvm-svn: 313565

rL310710 allowed store merging to occur after legalization to catch stores that are created late,
but this exposes a logic hole seen in PR34217:
https://bugs.llvm.org/show_bug.cgi?id=34217

We will miss merging stores if the target lowers vector extracts into target-specific operations.
This patch allows store merging to occur both before and after legalization if the target chooses
to get maximum merging.

I don't think the potential regressions in the other tests are relevant. The tests are for
correctness of weird IR constructs rather than perf tests, and I think those are still correct.

Differential Revision: https://reviews.llvm.org/D37987

llvm-svn: 313564

The AssertZext we might see in this case is only giving information about the lower 32 bits. It isn't providing information about the upper 32 bits. So we should emit a zext.

This fixes PR28540.

Differential Revision: https://reviews.llvm.org/D37729

llvm-svn: 313563

llvm-svn: 313562

Summary:
With the recent move of `android_commands` to `sanitizer_common`, some things
have to be updated with regard to Scudo on Android.

Notably:
- `config.android` is dealt with in the common code
- `config.compile_wrapper` can be prepended to allow for the use of the android
  commands
- `SCUDO_OPTIONS` must be passed with the environment when running a test
- `preinit.cpp` fails with some API levels, not sure why, I will have to dig
  into this later.

Note that `check-scudo` is not enabled yet in the bots. It's all local testing
for now until everything looks good.

Reviewers: alekseyshl, vitalybuka

Reviewed By: vitalybuka

Subscribers: srhines, kubamracek, llvm-commits

Differential Revision: https://reviews.llvm.org/D37990

llvm-svn: 313561

llvm-svn: 313560

llvm-svn: 313559

This is similar to D37843, but for sub_8bit. This fixes all of the patterns except for the 2 that emit only an EXTRACT_SUBREG. That causes a verifier error with global isel because global isel doesn't know to issue the ABCD when doing this extract on 32-bits targets.

Differential Revision: https://reviews.llvm.org/D37890

llvm-svn: 313558

I'm pretty sure that InstrEmitter::EmitSubregNode will take care of this itself by calling ConstrainForSubReg which in turn calls TRI->getSubClassWithSubReg.

I think Jakob Stoklund Olesen alluded to this in his commit message for r141207 which added the code to EmitSubregNode.

Differential Revision: https://reviews.llvm.org/D37843

llvm-svn: 313557

"Repl" member is guranteed to have a non-null pointer. If an input
section is not merged by ICF, "Repl" points to "this". Otherwise, it
points to some other section. It must not be NULL.

llvm-svn: 313556

Refine the model of FP loads and stores.

llvm-svn: 313555

Refine the model of loads and stores using the register offset addressing
modes.

llvm-svn: 313554

Fix formatting in the predicate function AArch64InstrInfo::isExynosShiftLeftFast().

llvm-svn: 313553

r313390 taught 'allowExtraAnalysis' to check whether remarks are
enabled at all.  Use that to only do the expensive instruction printing
if they are.

llvm-svn: 313552

Summary:
1. Update ubsan_interface.inc to make the test happy.
2. Switch interface_symbols_linux and interface_symbols_darwin to C++ to import __ubsan_handle_dynamic_type_cache_miss
3. Switch interface_symbols_windows to C++ for consistency.

Reviewers: rnk, zturner

Subscribers: llvm-commits, kubamracek

Differential Revision: https://reviews.llvm.org/D37986

llvm-svn: 313551

This is not really OK in C++11, and GCc triggers a warning.
We can switch back to default arguments when C++14 will be the
minimum version of the standard supported, see:
http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#974

Ack'ed by Rafael.

llvm-svn: 313550

This should fix an issue which arises when running check-compiler-rt on
the coverage bot:
http://green.lab.llvm.org/green/job/clang-stage2-coverage-R_build/1590/

The bot doesn't build the sanitizers, but the check-compiler-rt target
always expects the profile runtime to exist.

llvm-svn: 313549

llvm-svn: 313548

As commented on D37849, AVX1 targets were missing a chance to use vmovmskps for v8f32/v8i32 results for bool vector bitcasts

llvm-svn: 313547

cl::opt<unsigned long> is not specialized and hence the option
-polly-optree-max-ops impossible to use.

Replace by supported option cl::opt<unsigned>.

Also check for an error state when computing the written value, which
happens when the quota runs out.

llvm-svn: 313546

llvm-svn: 313545

Summary:
Add test cases when float <-> pointer types conversion is triggered
in presence of load instructions.

Reviewers: Ayal, srhines, mkuper, rengolin

Reviewed By: rengolin

Subscribers: javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D37967

llvm-svn: 313544

For cases where we are BITCASTing to vectors of smaller elements, then if the entire source was a splatted sign (src's NumSignBits == SrcBitWidth) we can say that the dst's NumSignBit == DstBitWidth, as we're just splitting those sign bits across multiple elements.

We could generalize this but at the moment the only use case I have is to peek through bitcasts to vector comparison results.

Differential Revision: https://reviews.llvm.org/D37849

llvm-svn: 313543

The shuffle combining and lowerVectorShuffleAsLanePermuteAndBlend were both still trying to use VPERM2XF128 for unary shuffles when AVX2 is enabled. VPERM2X128 takes two inputs meaning when we use it for a unary shuffle one of those inputs is left undefined creating a false dependency on whatever register gets allocated there.

If we have VPERMQ/PD we should prefer those since they only have a single input.

Differential Revision: https://reviews.llvm.org/D37947

llvm-svn: 313542

llvm-svn: 313541

Broke Windows and FreeBSD (at least).

This reverts commit 628ca7052b4a5dbace0f6205409113e12c8a78fa.

llvm-svn: 313540

This reverts commit r313537 because it fails to link on linux buildbots

llvm-svn: 313539

Summary:
Mark Android as supported in the cmake configuration for Scudo.

Scudo is not added yet in the Android build bots, but code builds and tests
pass locally. It is for a later CL. I also checked that Scudo builds as part
of the Android toolchain.

A few modifications had to be made:
- Android defaults to `abort_on_error=1`, which doesn't work well with the
  current tests. So change the default way to pass `SCUDO_OPTIONS` to the tests
  to account for this, setting it to 0 by default;
- Disable the `valloc.cpp` & `random_shuffle.cpp` tests on Android;
- There is a bit of gymnatic to be done with the `SCUDO_TEST_TARGET_ARCH`
  string, due to android using the `-android` suffix, and `i686` instead of
  `i386`;
- Android doesn't need `-lrt`.

Reviewers: alekseyshl, eugenis

Reviewed By: alekseyshl

Subscribers: srhines, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D37907

llvm-svn: 313538

Summary:
This allows for the stack size to be configured, which isn't
possible with std::thread. Prevents overflowing the stack when
performing complex operations in the task pool on darwin,
where the default pthread stack size is only 512kb.

Reviewers: labath, tberghammer, clayborg

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D37930

llvm-svn: 313537

Summary:
Fix for bug https://bugs.llvm.org/show_bug.cgi?id=34559
Also log unknown fields instead of aborting the JSON parsing because it's
common that new optional fields are added either in new versions of the protocol
or extensions.

Reviewers: ilya-biryukov

Reviewed By: ilya-biryukov

Subscribers: ilya-biryukov

Tags: #clang-tools-extra

Differential Revision: https://reviews.llvm.org/D37754

llvm-svn: 313536

Add the missing hardware features the ProcA55 and ProcA75 feature.
These are already enabled via the target parser, but I had missed
them in the backend.

Differential Revision: https://reviews.llvm.org/D37974

llvm-svn: 313535

llvm-svn: 313534

Implement the isTruncateFree hooks, lifted from AArch64, that are
used by TargetTransformInfo. This allows simplifycfg to reduce the
test case into a single basic block.

Differential Revision: https://reviews.llvm.org/D37516

llvm-svn: 313533

As discussed on PR28925 and D37849.

Differential Revision: https://reviews.llvm.org/D37975

llvm-svn: 313532

The indexed dot product instructions only accept the lower 16 D-registers as
the indexed register, but we were e.g. incorrectly accepting:

vudot.u8 d16,d16,d18[0]

Differential Revision: https://reviews.llvm.org/D37968

llvm-svn: 313531

This patch makes the `.eh_frame` extension an alias for `.debug_frame`.
Up till now it was only possible to dump the section using objdump, but
not with dwarfdump. Since the two are essentially interchangeable, we
dump whichever of the two is present.

As a workaround, this patch also adds parsing for 3 currently
unimplemented CFA instructions: `DW_CFA_def_cfa_expression`,
`DW_CFA_expression`, and `DW_CFA_val_expression`. Because I lack the
required knowledge, I just parse the fields without actually creating
the instructions.

Finally, this also fixes the typo in the `.debug_frame` section name
which incorrectly contained a trailing `s`.

Differential revision: https://reviews.llvm.org/D37852

llvm-svn: 313530

llvm-svn: 313529

We were reusing the 'false' select value 'is zero' variable name for the 'true' select value 'is zero' variable name.

llvm-svn: 313528

In r301670 IR verification was disabled. Since then, CodeGen writing
malformed IR would only be noticed by unpredictable behavior in
follow-up passes (e.g. segfaults, infinite loops) or IR verification in
the backend assert builds.

Re-enable -polly-codegen-verify at for the regression tests to ensure
that malformed IR is detected where Polly generated malformed IR in the
past and changes in CodeGen are at least partially covered by
check-polly
(otherwise malformed IR may only get noticed when the buildbots run the
test-suite).

Differential Revision: https://reviews.llvm.org/D37969

llvm-svn: 313527

The result of computeKnown has already been simplified.

llvm-svn: 313526