Patch allows to pass a symbols file to linker.
LLD will map symbols to sections and sort sections
in output according to symbol ordering file.

That can help to reduce the startup time and/or
amount of pagefaults during startup.

Also, interesting benchmark result was produced by Rafael Espíndola. 
After applying the symbols file for clang he timed compiling 
X86MCTargetDesc.ii to an object file.  

The page faults went from just
56,988 to 56,946 since most faults are not in the binary.
Running time went from 4.403053515 to 4.178112244. 
The speedup seems to be because of better cache
locality.

Differential revision: https://reviews.llvm.org/D26130

llvm-svn: 286440

llvm-svn: 286422

This version of addRegular is almost identical to the other except
it lacked "size" parameter.

llvm-svn: 286416

The disadvantage is that we use uint64_t instad of uint32_t for some
value in 32 bit files. The advantage is a substantially simpler code,
faster builds and less code duplication.

llvm-svn: 286414

llvm-svn: 286406

llvm-svn: 286405

llvm-svn: 286401

Previously, we have both input and output section for .MIPS.abiflags.
Now we have only one class for .MIPS.abiflags, which is MipsAbiFlagsSection.
This class is a synthetic input section.

.MIPS.abiflags sections are handled as regular sections until
the control reaches Writer. Writer then aggregates all sections
whose type is SHT_MIPS_ABIFLAGS to create a single synthesized
input section. The synthesized section is then processed normally
as if it came from an input file.

llvm-svn: 286398

Previously, we have both input and output sections for .reginfo and
.MIPS.options. Now for each such sections we have one synthetic input
sections: MipsReginfoSection and MipsOptionsSection respectively.

Both sections are handled as regular sections until the control reaches
Writer. Writer then aggregates all sections whose type is SHT_MIPS_REGINFO
or SHT_MIPS_OPTIONS to create a single synthesized input section. In that
moment Writer also save GP0 value to the MipsGp0 field of the corresponding
ObjectFile. This value required for R_MIPS_GPREL16 and R_MIPS_GPREL32
relocations calculation.

Differential revision: https://reviews.llvm.org/D26444

llvm-svn: 286397

It was quite confusing that it had SectionKind of Regular, but was not
actually a InputSection.

llvm-svn: 286379

During link of devel/chrpath (FreeBSD port), found next issue:
/usr/bin/ld: error: unclosed comment in a linker script
/usr/bin/ld: error: line 1: unknown directive: �
/usr/bin/ld: error: ��

Problem was not obvious and the reason was that we did not accept
the separate form of -R. While invocation line contained it:
cc -Wl,-R /usr/local/lib -o prog prog.c

CPIO file produced contained /usr/local/lib file. 
Which looks because of reasons above
contained inside the content of whole lib folder, 
and it then was passed as an input and
proccessed as linker script.

llvm-svn: 286378

llvm-svn: 286370

    
The ARM 32 and 64-bit ABI does not use 0 for undefined weak references
that are used in PC relative relocations. In particular:
- A branch relocation to an undefined weak resolves to the next
  instruction. Effectively making the branch a no-op
- In all other cases the symbol resolves to the place so that S + A - P
  resolves to A.

Differential Revision: https://reviews.llvm.org/D26240

llvm-svn: 286353

llvm-svn: 286348

This is similar to what was done for InputSection.

With this the various fields are stored in host order and only
converted to target order when writing.

llvm-svn: 286327

All tests pass without the first parameter, so I guess we don't need it.

Differential Revision: https://reviews.llvm.org/D26411

llvm-svn: 286287

llvm-svn: 286286

llvm-svn: 286282

Avoids having to skip them multiple times.

llvm-svn: 286261

Differential revision: https://reviews.llvm.org/D26397

llvm-svn: 286244

llvm-svn: 286242

Thanks to Malcolm Parsons who pointed on that.

llvm-svn: 286239

We can just use a regular InputSection.

llvm-svn: 286237

This reverts commit r286100.

This saves 8 bytes of every InputSection.

llvm-svn: 286235

With the current infrastructure it can be just an ordinary
InputSection like the real .bss sections.

llvm-svn: 286234

Differential revision: https://reviews.llvm.org/D25325

llvm-svn: 286225

llvm-svn: 286220

llvm-svn: 286194

llvm-svn: 286193

llvm-svn: 286158

Differential revision: https://reviews.llvm.org/D26281

llvm-svn: 286100

This fixes casting warning and removes the need of that cast at all.

llvm-svn: 286065

llvm-svn: 286064

Patch switches computing of --build-id hash to tree.

This is the way when input data is splitted by chunks,
hash is computed for each one in threaded/non-threaded way.
At the end hash is conputed for result tree.

With or without -threads the result hash is the same.

Differential revision: https://reviews.llvm.org/D26199

llvm-svn: 286061

llvm-svn: 286054

A CommonInputSection is a section containing all common symbols.
That was an input section but was abstracted in a different way
than the synthetic input sections because it was written before
the synthetic input section was invented.

This patch rewrites CommonInputSection as a synthetic input section
so that it behaves better with other sections.

llvm-svn: 286053

In short the patch introduces support for linking object file conform
MIPS N32 ABI [1]. This ABI is similar to N64 ABI but uses 32-bit
pointer size.

The most non-trivial requirement of this ABI is one more relocation
packing format. N64 ABI puts multiple relocation type into the single
relocation record. The N32 ABI uses series of successive relocations
with the same offset for this purpose. In this patch, new function
`mergeMipsN32RelTypes` handle this case and "convert" N32 relocation to
the N64 relocation so the rest of the code keep unchanged.

For now, linker does not support series of relocations applied to sections
without SHF_ALLOC bit. Probably later I will add the support or insert
some sort of assert into the `relocateNonAlloc` routine to catch this
case.

[1] ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/MIPS-N32-ABI-Handbook.pdf

Differential revision: https://reviews.llvm.org/D26298

llvm-svn: 286052

Previously, we do this piece of code to iterate over all input sections.

  for (elf::ObjectFile<ELFT> *F : Symtab.getObjectFiles())
    for (InputSectionBase<ELFT> *S : F->getSections())

It turned out that this mechanisms doesn't work well with synthetic
input sections because synthetic input sections don't belong to any
input file.

This patch defines a vector that contains all input sections including
synthetic ones.

llvm-svn: 286051

Differential revision: https://reviews.llvm.org/D26320

llvm-svn: 286030

This change fixes a bug that was introduced by r285851.
r285851 converted .interp section as an output section to an input
section. But I forgot to make it a "Live" section, so if -gc-section
is given, it was garbage collected.

llvm-svn: 286025