NFC, just makes the OutputSectionCommand available.

llvm-svn: 308056

llvm-svn: 308055

Summary:
This patch introduces incremental edge insertions based on the Depth Based Search algorithm.

Insertions should work for both dominators and postdominators.

Reviewers: dberlin, grosser, davide, sanjoy, brzycki

Reviewed By: dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35341

llvm-svn: 308054

Summary:
Set proper errno code on alloction failure and change pvalloc and
posix_memalign implementation to satisfy their man-specified
requirements.

Reviewers: cryptoad

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35429

llvm-svn: 308053

llvm-svn: 308052

Summary:
When checking for memory dependencies between calls using MemorySSA,
handle cases where the calls have no MemoryAccess associated with them
because the AA analysis being used has determined that the call does not
read/write memory.

Fixes PR33756

Reviewers: dberlin, davide

Subscribers: mcrosier, llvm-commits, Prazek

Differential Revision: https://reviews.llvm.org/D35317

llvm-svn: 308051

Add the following pattern to TryToUnfoldSelectInCurrBB()

bb:
   %p = phi [0, %bb1], [1, %bb2], [0, %bb3], [1, %bb4], ...
   %c = cmp %p, 0
   %s = select %c, trueval, falseval

The Select in the above pattern will be unfolded and then jump-threaded. The
current implementation does not allow CMP in the middle of PHI and Select.

Differential Revision: https://reviews.llvm.org/D34762

llvm-svn: 308050

This breaks up pack-even and pack-odd into two separate operations.

llvm-svn: 308049

llvm-svn: 308048

Unbreaks the build with GCC7.

llvm-svn: 308047

llvm-svn: 308046

Summary: use EmitAssemblyAction in clang-fuzzer

Reviewers: klimek, rsmith

Reviewed By: klimek

Subscribers: cfe-commits, mgorny

Differential Revision: https://reviews.llvm.org/D34267

llvm-svn: 308045

https://reviews.llvm.org/D35379

llvm-svn: 308044

D34304 created a way for ToolInvocations to conditionally generate
dependency files, and updated call sites to preserve the old behavior
of not generating them by default. CompilerInvocations...

Summary:
...are yet another
call-path that needs updating to preserve the old behavior.

Reviewers: klimek, echristo

Reviewed By: echristo

Subscribers: echristo, cfe-commits

Differential Revision: https://reviews.llvm.org/D35131

llvm-svn: 308043

One place compared with 32, which I've replaced with LaneBitmask::BitWidth.

The other places are shifts of a constant 1 by a lane number. But if LaneBitmask were to be a larger type than 32-bits like 64-bits, the 1 would need to be 1ULL to do a 64-bit shift. To hide this I've added a LanebitMask::getLane that hides the shift and make sures the 1 is casted to correct type first.

llvm-svn: 308042

Summary: This patch makes the Clang's DominatorTree use the new IsPostDom template argument for DominatorTreeBase.

Reviewers: dberlin, sanjoy, davide, grosser

Reviewed By: dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35316

llvm-svn: 308041

Summary:
DominatorTreeBase used to have IsPostDominators (bool) member to indicate if the tree is a dominator or a postdominator tree. This made it possible to switch between the two 'modes' at runtime, but it isn't used in practice anywhere.

This patch makes IsPostDominator a template argument. This way, it is easier to switch between different algorithms at compile-time based on this argument and design external utilities around it. It also makes it impossible to incidentally assign a postdominator tree to a dominator tree (and vice versa), and to further simplify template code in GenericDominatorTreeConstruction.

Reviewers: dberlin, sanjoy, davide, grosser

Reviewed By: dberlin

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D35315

llvm-svn: 308040

In moveToVALU(), move to vector ALU is performed, all instrs in
the use chain will be visited. We do not want the same node to be
pushed to the visit worklist more than once.

Differential Revision: https://reviews.llvm.org/D34726

llvm-svn: 308039

Patch by Fedor Sergeev

llvm-svn: 308038

C11 standard refers to the signed counterpart of the type size_t in
the paragraph 7.21.6.1 where it defines d, i, o, u, x, or x conversion specifiers
(in printf format string).
In Clang there is a FIXME (in lib/Analysis/PrintfFormatString.cpp) for this case
(which is not handled correctly at the moment).
This diff adds getSignedSizeType method to TargetInfo and exposes it 
in ASTContext similarly to how it is done for getSizeType.
lib/Analysis/PrintfFormatString.cpp will be changed in a separate commit.

Differential revision: https://reviews.llvm.org/D35378

Test plan: make check-all

llvm-svn: 308037

Summary:
This patch adds `BlockPrinter`-- a small wrapper for printing CFG nodes and DomTree nodes to `raw_ostream`. It is meant to be only used internally, for debugging and printing errors.

Reviewers: dberlin, sanjoy, grosser, davide

Reviewed By: grosser, davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35286

llvm-svn: 308036

This is the clang part, adding support for
  void __builtin_HEXAGON_Y2_dccleana(void*);
  void __builtin_HEXAGON_Y2_dccleaninva(void*);
  void __builtin_HEXAGON_Y2_dcinva(void*);
  void __builtin_HEXAGON_Y2_dczeroa(void*);
  void __builtin_HEXAGON_Y4_l2fetch(void*, unsigned);
  void __builtin_HEXAGON_Y5_l2fetch(void*, unsigned long long);
Requires r308032.

llvm-svn: 308035

llvm-svn: 308034

Nothing special here, output format is similar to the format
used by binutils readelf and ELF Tool Chain readelf.

Differential revision: https://reviews.llvm.org/D35351

llvm-svn: 308033

This is the LLVM part, adding definitions for
  void @llvm.hexagon.Y2.dccleana(i8*)
  void @llvm.hexagon.Y2.dccleaninva(i8*)
  void @llvm.hexagon.Y2.dcinva(i8*)
  void @llvm.hexagon.Y2.dczeroa(i8*)
  void @llvm.hexagon.Y4.l2fetch(i8*, i32)
  void @llvm.hexagon.Y5.l2fetch(i8*, i64)
The clang part will follow.

llvm-svn: 308032

As discussed in:
https://bugs.llvm.org/show_bug.cgi?id=32401

we have a backend transform to undo this:
https://reviews.llvm.org/rL299542

when it's likely that the xor version leads to better codegen, but we want 
this form in IR for better analysis and simplification potential.

llvm-svn: 308031

FileCheck is crashing on in the input file, so reverting again while
I investigate.

This reverts r308023.

llvm-svn: 308030

Also, add comments to a couple of tests that could be moved out of instcombine.

llvm-svn: 308029

Some minor corrections for the recently added instructions.

Review: Ulrich Weigand
llvm-svn: 308028

llvm-svn: 308027

Recommiting after adding check to avoid miscomputing alias information
on addresses of the same base but different subindices.

Memory accesses offset from frame indices may alias, e.g., we
may merge write from function arguments passed on the stack when they
are contiguous. As a result, when checking aliasing, we consider the
underlying frame index's offset from the stack pointer.

Static allocs are realized as stack objects in SelectionDAG, but its
offset is not set until post-DAG causing DAGCombiner's alias check to
consider access to static allocas to frequently alias. Modify isAlias
to consider access between static allocas and access from other frame
objects to be considered aliasing.

Many test changes are included here. Most are fixes for tests which
indirectly relied on our aliasing ability and needed to be modified to
preserve their original intent.

The remaining tests have minor improvements due to relaxed
ordering. The exception is CodeGen/X86/2011-10-19-widen_vselect.ll
which has a minor degradation dispite though the pre-legalized DAG is
improved.

Reviewers: rnk, mkuper, jonpa, hfinkel, uweigand

Reviewed By: rnk

Subscribers: sdardis, nemanjai, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D33345

llvm-svn: 308025

Loop data prefetching has shown some improvements on benchmarks, and is
enabled at -O1 and above.

Review: Ulrich Weigand
llvm-svn: 308024

Unlike many other instructions, these instructions have aliases which
take coprocessor registers, gpr register, accumulator (and dsp accumulator)
registers, floating point registers, floating point control registers and
coprocessor 2 data and control operands.

For the moment, these aliases are treated as pseudo instructions which are
expanded into the underlying instruction. As a result, disassembling these
instructions shows the underlying instruction and not the alias.

Reviewers: slthakur, atanasyan

Differential Revision: https://reviews.llvm.org/D35253

The last version of this patch broke one of the expensive checks buildbots,
this version changes the failing test/MC/Mips/mt/invalid.s and other invalid
tests to write the errors to a file and run FileCheck on that, rather than
relying on the 'not llvm-mc ... <%s 2>&1 | Filecheck %s' idiom.

Hopefully this will sarisfy the buildbot.

llvm-svn: 308023

llvm-svn: 308022

Patch by: Reka Nikolett Kovacs

Differential Revision: https://reviews.llvm.org/D35051

llvm-svn: 308021

Created new module bugprone and placed the check in that.

Finds memset() calls with potential mistakes in their arguments.
Replaces and extends the existing google-runtime-memset-zero-length check.

Cases covered:
* Fill value is a character '0'. Integer 0 might have been intended.
* Fill value is out of char range and gets truncated.
* Byte count is zero. Potentially swapped with the fill value argument.

Patch by: Reka Nikolett Kovacs

Differential Revision: https://reviews.llvm.org/D32700

llvm-svn: 308020

This change implements 2 optimizations of sync clocks that reduce memory consumption:

Use previously unused first level block space to store clock elements.
Currently a clock for 100 threads consumes 3 512-byte blocks:

2 64-bit second level blocks to store clock elements
+1 32-bit first level block to store indices to second level blocks
Only 8 bytes of the first level block are actually used.
With this change such clock consumes only 2 blocks.

Share similar clocks differing only by a single clock entry for the current thread.
When a thread does several release operations on fresh sync objects without intervening
acquire operations in between (e.g. initialization of several fields in ctor),
the resulting clocks differ only by a single entry for the current thread.
This change reuses a single clock for such release operations. The current thread time
(which is different for different clocks) is stored in dirty entries.

We are experiencing issues with a large program that eats all 64M clock blocks
(32GB of non-flushable memory) and crashes with dense allocator overflow.
Max number of threads in the program is ~170 which is currently quite unfortunate
(consume 4 blocks per clock). Currently it crashes after consuming 60+ GB of memory.
The first optimization brings clock block consumption down to ~40M and
allows the program to work. The second optimization further reduces block consumption
to "modest" 16M blocks (~8GB of RAM) and reduces overall RAM consumption to ~30GB.

Measurements on another real world C++ RPC benchmark show RSS reduction
from 3.491G to 3.186G and a modest speedup of ~5%.

Go parallel client/server HTTP benchmark:
https://github.com/golang/benchmarks/blob/master/http/http.go
shows RSS reduction from 320MB to 240MB and a few percent speedup.

Reviewed in https://reviews.llvm.org/D35323

llvm-svn: 308018

llvm-svn: 308017

Summary:
We need it in clangd for refactoring that replaces ASTUnit
with manual AST management.

Reviewers: akyrtzi, benlangmuir, arphaman, klimek

Reviewed By: arphaman

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D35405

llvm-svn: 308016

Summary:
To get properly integration Clang-Tidy with CLion IDE, next things were implemented:
* Preserve `Message`, `FileOffset`, `FilePath` in the clang-tidy output.
* Export all diagnostics, not just the ones with fixes
* Test-cases

Reviewers: alexfh, ilya-biryukov

Subscribers: mgorny, JDevlieghere, xazax.hun, cfe-commits

Tags: #clang-tools-extra

Patch by Vladimir Plyashkun!

Differential Revision: https://reviews.llvm.org/D35349

llvm-svn: 308015