- Apr 14, 2016
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Richard Smith authored
llvm-svn: 266359
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Aaron Ballman authored
Patch by Clement Courbet. llvm-svn: 266358
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Rafael Espindola authored
The DenseMap doesn't store hash results. This means that when it is resized it has to recompute them. This patch is a small hack that wraps the StringRef in a struct that remembers the hash value. That way we can be sure it is only hashed once. llvm-svn: 266357
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Tom Stellard authored
Summary: This adds the necessary target code to be able to run the ir translator. Lowering function arguments and returns is a nop and there is no support for RegBankSelect. Reviewers: arsenm, qcolombet Subscribers: arsenm, joker.eph, vkalintiris, llvm-commits Differential Revision: http://reviews.llvm.org/D19077 llvm-svn: 266356
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Rafael Espindola authored
llvm-svn: 266355
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Dehao Chen authored
Summary: Add discriminator for nested call correctly. Reviewers: davidxl, dnovillo Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D19127 llvm-svn: 266354
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Richard Smith authored
llvm-svn: 266353
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Ulrich Weigand authored
CreateChildAtOffset needs a byte offset, not an element number. llvm-svn: 266352
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Reid Kleckner authored
MachineInstr.h and MachineInstrBuilder.h are very popular headers, widely included across all LLVM backends. It turns out that there only a handful of TUs that actually care about DI operands on MachineInstrs. After this change, touching DebugInfoMetadata.h and rebuilding llc only needs 112 actions instead of 542. llvm-svn: 266351
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Davide Italiano authored
llvm-svn: 266350
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Jacques Pienaar authored
llvm-svn: 266349
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Tom Stellard authored
Reviewers: qcolombet Subscribers: joker.eph, vkalintiris, llvm-commits Differential Revision: http://reviews.llvm.org/D19120 llvm-svn: 266348
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Nicolai Haehnle authored
Summary: If a PHI has an incoming undef, we can pretend that it is equal to one non-undef, non-self incoming value. This is particularly relevant in combination with the StructurizeCFG pass, which introduces PHI nodes with undefs. Previously, this lead to branch conditions that were uniform before StructurizeCFG to become non-uniform afterwards, which confused the SIAnnotateControlFlow pass. This fixes a crash when Mesa radeonsi compiles a shader from dEQP-GLES3.functional.shaders.switch.switch_in_for_loop_dynamic_vertex Reviewers: arsenm, tstellarAMD, jingyue Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D19013 llvm-svn: 266347
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Nicolai Haehnle authored
Summary: This fully solves the problem where the StructurizeCFG pass does not consider the same branches as uniform as the SIAnnotateControlFlow pass. The patch in D19013 helps with this problem, but is not sufficient (and, interestingly, causes a "regression" with one of the existing test cases). No tests included here, because tests in D19013 already cover this. Reviewers: arsenm, tstellarAMD Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19018 llvm-svn: 266346
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Nicolai Haehnle authored
Summary: This pass is unnecessary and overly conservative. It was motivated by situations like def %vreg0:SGPR_32 ... if-block: .. def %vreg1:SGPR_32 ... else-block: ... use %vreg0:SGPR_32 ... and similar situations with uses after the non-uniform control flow, where we are not allowed to assign %vreg0 and %vreg1 to the same physical register, even though in the original, thread/workitem-based CFG, it looks like the live ranges of these registers do not overlap. However, by the time register allocation runs, we have moved to a wave-based CFG that accurately represents the fact that the wave may run through both the if- and the else-block. So the live ranges of %vreg0 and %vreg1 already overlap even without the SIFixSGPRLiveRanges pass. In addition to proving this change correct, I have tested it with Piglit and a small number of other tests. Reviewers: arsenm, tstellarAMD Subscribers: MatzeB, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19041 llvm-svn: 266345
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Nicolai Haehnle authored
Summary: I've been carrying this change around with me for a while, because the if () managed to confuse me while following the code. All callers ensure that the assertion holds. Reviewers: arsenm, tstellarAMD Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19042 llvm-svn: 266344
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Ulrich Weigand authored
This seems to hang on non-s390x hosts. Disable for now to get the build bots going again. llvm-svn: 266343
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Tom Stellard authored
Reviewers: qcolombet Subscribers: joker.eph, llvm-commits, vkalintiris Differential Revision: http://reviews.llvm.org/D19119 llvm-svn: 266342
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Ulrich Weigand authored
Try to get 32-bit build bots running again. llvm-svn: 266341
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George Rimar authored
llvm-svn: 266340
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Tim Northover authored
FastRegAlloc works only at the basic-block level and spills all live-out registers. Unfortunately for a stack-based cmpxchg near the spill slots, this can perpetually clear the exclusive monitor, which means the cmpxchg will never succeed. I believe the only way to handle this within LLVM is by expanding the loop post-regalloc. We don't want this in general because it severely limits the optimisations that can be done, so we limit this to -O0 compilations. It's an ugly hack, and about the one good point in the whole mess is that we can treat all cmpxchg operations in the most naive way possible (seq_cst, no clrex faff) without affecting correctness. Should fix PR25526. llvm-svn: 266339
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Jacques Pienaar authored
Summary: Add getMemOpBaseRegImmOfsWidth to enable determining independence during MiSched. Reviewers: eliben, majnemer Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D18903 llvm-svn: 266338
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Tom Stellard authored
Summary: For GL_ARB_compute_shader we need to support workgroup sizes of at least 1024. However, if we want to allow large workgroup sizes, we may need to use less registers, as we have to run more waves per SIMD. This patch adds an attribute to specify the maximum work group size the compiled program needs to support. It defaults, to 256, as that has no wave restrictions. Reducing the number of registers available is done similarly to how the registers were reserved for chips with the sgpr init bug. Reviewers: mareko, arsenm, tstellarAMD, nhaehnle Subscribers: FireBurn, kerberizer, llvm-commits, arsenm Differential Revision: http://reviews.llvm.org/D18340 Patch By: Bas Nieuwenhuizen llvm-svn: 266337
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Tom Stellard authored
Summary: The code previously always used s1 as it was using the user + system SGPR information for compute kernels. This is incorrect for Mesa shaders though, The register should be the next SGPR after all user and system SGPR's. We use that Mesa adds arguments for all input and system SGPR's and take the next available SGPR for the scratch wave offset register. Signed-off-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewers: mareko, arsenm, nhaehnle, tstellarAMD Subscribers: qcolombet, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D18941 Patch By: Bas Nieuwenhuizen llvm-svn: 266336
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Betul Buyukkurt authored
llvm-svn: 266335
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Silviu Baranga authored
Summary: Add a print method to Predicated Scalar Evolution which prints all interesting transformations done by PSE. Loop Access Analysis will now print this as part of the analysis output. We now use this to check the exact expression transformations that were done by PSE in LAA. The additional checking also acts as white-box testing for the getAsAddRec method. Reviewers: anemet, sanjoy Subscribers: sanjoy, mzolotukhin, llvm-commits Differential Revision: http://reviews.llvm.org/D18792 llvm-svn: 266334
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Etienne Bergeron authored
Summary: The patch is fixing the generation of clang-tidy documentation. Reviewers: alexfh Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D19121 llvm-svn: 266333
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Jonathan Peyton authored
ittnotify fix for barrier imbalance time in case tasks exist. In the current implementation, task execution time is included into aggregated time on a barrier. This fix calculates task execution time and corrects the arrive time by subtracting the task execution time. Since __kmp_invoke_task() can not only be called on a barrier, the field th.th_bar_arrive_time is used to check if the function was called at the barrier (th.th_bar_arrive_time != 0). So for this check, th_bar_arrive_time is set to zero right after the value is used on the barrier. Differential Revision: http://reviews.llvm.org/D19030 llvm-svn: 266332
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Aaron Ballman authored
Add typedefNameDecl() and typeAliasDecl() to the AST matchers; improves hasType() to match on TypedefNameDecl nodes. Patch by Clement Courbet. llvm-svn: 266331
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Rafael Espindola authored
llvm-svn: 266330
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Jonathan Peyton authored
This change adds back off logic in the test and set lock for better contended lock performance. It uses a simple truncated binary exponential back off function. The default back off parameters are tuned for x86. The main back off logic has a two loop structure where each is controlled by a user-level parameter: max_backoff - limits the outer loop number of iterations. This parameter should be a power of 2. min_ticks - the inner spin wait loop number of "ticks" which is system dependent and should be tuned for your system if you so choose. The "ticks" on x86 correspond to the time stamp counter, but on other architectures ticks is a timestamp derived from gettimeofday(). The user can modify these via the environment variable: KMP_SPIN_BACKOFF_PARAMS=max_backoff[,min_ticks] Currently, since the default user lock is a queuing lock, one would have to also specify KMP_LOCK_KIND=tas to use the test-and-set locks. Differential Revision: http://reviews.llvm.org/D19020 llvm-svn: 266329
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Rafael Espindola authored
llvm-svn: 266328
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Pavel Labath authored
The android dirty stderr problem has uncovered an issue where lldbutil.expect_state_changes was reading events other than state change events, which resulted in general confusion. Make it more strict to accept *only* state changes. llvm-svn: 266327
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Pavel Labath authored
Summary: On some android targets, a binary can produce additional garbage (e.g. warning messages from the dynamic linker) on the standard error, which confuses some tests. This relaxes the stderr expectations for targets known for their chattyness. Reviewers: tfiala, ovyalov Subscribers: tberghammer, danalbert, srhines, lldb-commits Differential Revision: http://reviews.llvm.org/D19114 llvm-svn: 266326
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Ismail Donmez authored
llvm-svn: 266324
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Michael Kruse authored
As discussed in the Polly weekly phone call and reviews.llvm.org/D18878, the assumed contexts changed (widen) due to D18878/r265942. Also check these contexts in the tests affected by that change. llvm-svn: 266323
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Michael Kruse authored
This allows the test update script to add 'Invalid Context:' to test cases. Enable with --check-include=InvalidContext. llvm-svn: 266322
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Marianne Mailhot-Sarrasin authored
Indentation of the last line was reset to the initial indentation of the block when reaching EOF. Patch by Maxime Beaulieu Differential Revision: http://reviews.llvm.org/D19065 llvm-svn: 266321
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Marianne Mailhot-Sarrasin authored
Use tabs to fill whitespace at the start of a line. Patch by Maxime Beaulieu Differential Revision: http://reviews.llvm.org/D19028 llvm-svn: 266320
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Marianne Mailhot-Sarrasin authored
Including VirtualFileSystem.h in the clangFormat.h indirectly includes <atomic>. This header is blocked when compiling with /clr. Patch by Maxime Beaulieu Differential Revision: http://reviews.llvm.org/D19064 llvm-svn: 266319
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