llvm-svn: 23092

giving it a non-instruction opcode.  The dag->dag selector used to not
select the operands of the fsel, because it thought that whole tree was
already selected.

llvm-svn: 23091

bool %test(int %X, int %Y) {
        %C = setne int %X, 0
        ret bool %C
}

to:

_test:
        addic r2, r3, -1
        subfe r3, r2, r3
        blr

llvm-svn: 23089

just return its input, instead of emitting an explicit copy.

llvm-svn: 23088

llvm-svn: 23085

llvm-svn: 23084

when the RHS of the comparison is 0.0.  Turn this on by default.

llvm-svn: 23083

llvm-svn: 23082

putting it into the constant pool.  This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.

llvm-svn: 23081

llvm-svn: 23080

every other SD API.  Fix it to take the opcode before the types.

llvm-svn: 23079

llvm-svn: 23076

instead of in the backend.  This currently handles fsel cases with registers,
but doesn't have the 0.0 and -0.0 optimization enabled yet.

Once this is finished, special hack for fp immediates can go away.

llvm-svn: 23075

llvm-svn: 23073

llvm-svn: 23072

llvm-svn: 23068

return.  Allow the udiv breaker-upper to work with any non-zero constant
operand.

llvm-svn: 23066

llvm-svn: 23065

ISelPattern

llvm-svn: 23062

doesn't work for large uint constants, but we'll keep the current behavior

llvm-svn: 23061

llvm-svn: 23060

they will come later.

llvm-svn: 23059

Chris.  This will be accomplished through correctly modeling CR's and
subregs.

llvm-svn: 23056

_test:
        srawi r2, r3, 2
        addze r3, r2
        blr

llvm-svn: 23052

llvm-svn: 23051

llvm-svn: 23048

is used by the int -> FP code among other things.  This gets
2005-05-12-Int64ToFP past that failure, to dying on lack of support for add_parts

llvm-svn: 23042

llvm-svn: 23038

around to functions and stuff

llvm-svn: 23036

llvm-svn: 23034

to codegen this: float foo() { return 1.245; }

into this:

_foo:
        lis r2, ha16(.CPI_foo_0)
        lfs f1, lo16(.CPI_foo_0)(r2)
        blr

instead of this:

_foo:
        lis r2, ha16(.CPI_foo_0)
        lfs r2, lo16(.CPI_foo_0)(r2)   <-- ouch
        or f1, r2, r2                  <-- ouch
        blr

with the dag isel.

llvm-svn: 23033

llvm-svn: 23032

llvm-svn: 23031

llvm-svn: 23030

llvm-svn: 23029

instructions take a consistent reg class.  Implement ISD::UNDEF in the dag->dag
selector to generate this, fixing UnitTests/2003-07-06-IntOverflow.

llvm-svn: 23028

llvm-svn: 23026

Emit the indcall sequence as:

mtctr inreg
mr R12, inreg
btctr

If inreg and R12 aren't coallesced, this reduces the odds of having the mtctr
and btctr in the same dispatch group.  :)

llvm-svn: 23023

llvm-svn: 23020

llvm-svn: 23010