prefix.  Added a FIXME to remind us this still does not work when it is not the
first prefix.

llvm-svn: 152414

~0U might be i32 on 32-bit hosts, then (uint64_t)~0U might not be expected as (i64)0xFFFFFFFF_FFFFFFFF, but as (i64)0x00000000_FFFFFFFF.

llvm-svn: 152407

llvm-svn: 152301

Original commit message:
Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable.

llvm-svn: 152296

Original commit message:
Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect 
all 16-bit string table offsets. Also make sure the string to offset table 
string is not larger than 65536 characters since larger string literals aren't 
portable.

llvm-svn: 152233

Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable.

llvm-svn: 152202

Register pair, all lanes subscripting.

llvm-svn: 152157

Register pair VLD1/VLD2 all-lanes instructions. Kill off more of the
pseudos as a result.

llvm-svn: 152150

Fix support for encodings up to 64-bits in length.  TableGen was silently truncating them to 32-bits prior to this.

llvm-svn: 152148

Use uint16_t to store indices into string table since C++ only allows 64K string literals so the index into the big string can never be larger than that.

llvm-svn: 152105

llvm-svn: 152104

llvm-svn: 152067

Use the new composite physical registers.

llvm-svn: 152063

With the new composite physical registers to represent arbitrary pairs
of DPR registers, we don't need the pseudo-registers anymore. Get rid of
a bunch of them that use DPR register pairs and just use the real
instructions directly instead.

llvm-svn: 152045

llvm-svn: 152019

llvm-svn: 152016

llvm-svn: 152001

llvm-svn: 151998

llvm-svn: 151996

Use uint8_t instead of enums to store values in X86 disassembler table. Shaves 150k off the size of X86DisassemblerDecoder.o

llvm-svn: 151995

llvm-svn: 151986

- Shrink the opcode field to 16 bits.
- Shrink the AsmVariantID field to 8 bits.
- Store the mnemonic string in a string table, store a 16 bit index.
- Store a pascal-style length byte in the string instead of a null terminator,
  so we can avoid calling strlen on every entry we visit during mnemonic search.

Shrinks X86AsmParser.o from 434k to 201k on x86_64 and eliminates relocs from the table.

llvm-svn: 151984

StringToOffsetTable: Allow uniquing the first element, add an option to skip appending a terminating null.

llvm-svn: 151983

llvm-svn: 151821

Allows us to de-virtualize the function and provides access to it in
the instruction printer, which is useful for handling composite
physical registers (e.g., ARM register lists).

llvm-svn: 151815

This reverts commit 151760.

We want to move getSubReg() from TargetRegisterInfo into MCRegisterInfo,
but to do that, the type of the lookup table needs to be the same for
all targets.

llvm-svn: 151814

This allows us to make TRC non-polymorphic and value-initializable, eliminating a huge static
initializer and a ton of cruft from the generated code.

Shrinks ARMBaseRegisterInfo.o by ~100k.

llvm-svn: 151806

llvm-svn: 151792

Shrinks BasicAliasAnalysis.o from 106k to 56k on i386.

llvm-svn: 151781

- The search bounds are constant, in the worst case (ARM target) it will scan over 30 uint16_ts.
- This method isn't very hot, I had problems finding a testcase where it's called more than a dozen of times (no perf impact).

llvm-svn: 151773

llvm-svn: 151764

Doesn't help ARM with its massive register set, but halves the size on x86 and all other targets.

llvm-svn: 151760

llvm-svn: 151758

llvm-svn: 151756

Instead of nested switch statements, use a lookup table. On ARM, this replaces
a 23k (x86_64 release build) function with a 16k table. Its not unlikely to
be faster, as well.

llvm-svn: 151751

llvm-svn: 151622

llvm-svn: 151513

llvm-svn: 151510

llvm-svn: 151246

Declare register classes as const. Fix a couple pointers to register classes that weren't already const.

llvm-svn: 151138