llvm-svn: 128196

use it later. I couldn't make a test that hits this with the current code.

llvm-svn: 128195

llvm-svn: 128194

On Mac OS X we now have 3 platforms:
PlatformDarwin - must be subclassed to fill in the missing pure virtual funcs
                 but this implements all the common functionality between
                 remote-macosx and remote-ios. It also allows for another
                 platform to be used (remote-gdb-server for now) when doing
                 remote connections. Keeping this pluggable will allow for
                 flexibility.
PlatformMacOSX - Now implements both local and remote macosx desktop platforms.
PlatformRemoteiOS - Remote only iOS that knows how to locate SDK files in the
                    cached SDK locations on the host.

A new agnostic platform has been created:
PlatformRemoteGDBServer - this implements the platform using the GDB remote 
                          protocol and uses the built in lldb_private::Host
                          static functions to implement many queries.

llvm-svn: 128193

CPS3p: Let's reject impossible imod values by returning false from the DisassembleMiscFrm() function.

Fixed rdar://problem/9179416 ARM disassembler crash: "Unknown imod operand" (fuzz testing)

Opcode=98 Name=CPS3p Format=ARM_FORMAT_MISCFRM(26)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 1: 0| 0: 0: 0: 1| 1: 1: 0: 0| 1: 0: 0: 1| 0: 0: 1: 1|
-------------------------------------------------------------------------------------------------

Before:
	cpsUnknown imod operand
UNREACHABLE executed at /Volumes/data/lldb/llvm/lib/Target/ARM/InstPrinter/../ARMBaseInfo.h:123!

After:
/Volumes/data/Radar/9179416/mc-input-arm.txt:1:1: warning: invalid instruction encoding
0x93 0x1c 0x2 0xf1
^

llvm-svn: 128192

These instructions were changed to not embed the addressing mode within the MC instructions
We also need to update the corresponding assert stmt.  Also add two test cases.

llvm-svn: 128191

change in functionality intended.

llvm-svn: 128190

We now tag them as IndexModePost.

llvm-svn: 128189

llvm-svn: 128188

llvm-svn: 128187

were incomplete.  The assert stmt needs to be updated and the operand index incrment is wrong.
Fix the bad logic and add some sanity checking to detect bad instruction encoding;
and add a test case.

llvm-svn: 128186

from a normal type-spec, just for completeness.

llvm-svn: 128185

llvm-svn: 128184

llvm-svn: 128183

llvm-svn: 128182

I'm backing this out for the second time. It was supposed to be fixed by r128164, but the mingw self-host must be defeating the fix.

llvm-svn: 128181

accessed via the indirect pointer, they don't need to be pointers to pointers).

Finished moving the message lookup code into separate subclasses for each
runtime.  Also performed a few smallish related tidies.

We're now bitcasting the result of the message lookup functions, rather than
casting the lookup functions themselves, so the messages.m test needed updating
to reflect this.

llvm-svn: 128180

int tries = INT_MAX;    
while (tries > 0) {
      tries--;
}

The check should be:
        subs    r4, #1
        cmp     r4, #0
        bgt     LBB0_1

The subs can set the overflow V bit when r4 is INT_MAX+1 (which loop
canonicalization apparently does in this case). cmp #0 would have cleared
it while not changing the N and Z bits. Since BGT is dependent on the V
bit, i.e. (N == V) && !Z, it is not safe to eliminate the cmp #0.

rdar://9172742

llvm-svn: 128179

llvm-svn: 128177

Also cleaning up some duplicated code while I'm here.

llvm-svn: 128176

(target-specific branchless method for double-width relational comparisons on x86)

llvm-svn: 128175

llvm-svn: 128173

This fixes 464.h264ref with the integrated assembler.

llvm-svn: 128172

The ExecutionEngine constructor already added the module, so there's no
need to call addModule() directly. Doing so causes a double-free of the
Module at program termination.

llvm-svn: 128171

Fix CFG-construction bug when run from AnalysisBasedWarnings::IssueWarnings() where block-level expressions that need
to be recorded in the Stmt*->CFGBlock* map were not always done so.  Fixes <rdar://problem/9171946>.

llvm-svn: 128170

Fix a bug introduced by my patch yesterday: BL is a 4-byte instructions like BLX, rather than a 2-byte instruction like B.

llvm-svn: 128169

llvm-svn: 128168

llvm-svn: 128167

so the scheduler can't create new interferences on the copies
themselves. Prior to this fix the scheduler could get stuck in a loop
creating copies.
Fixes PR9509.

llvm-svn: 128164

llvm-svn: 128163

    rdar://problem/9173060 lldb hangs while running unique-types

disappears if running with clang version >= 3.  Modify the TestUniqueTypes.py
to detect if we are running with clang version < 3 and, if true, skip the test.

Update the lldbtest.system() function to return a tuple of (stdoutdata, stderrdata)
since we need the stderr data from "clang -v" command.  Modify existing clients of
lldbtest.system() to now use, for example:

         # First, capture the golden output emitted by the oracle, i.e., the
         # series of printf statements.
-        go = system("./a.out", sender=self)
+        go = system("./a.out", sender=self)[0]
         # This golden list contains a list of (variable, value) pairs extracted
         # from the golden output.
         gl = []

And add two utility functions to lldbutil.py.

llvm-svn: 128162

llvm-svn: 128161

llvm-svn: 128160

function parameter. // rdar:// 9129552
and PR9406.

llvm-svn: 128159

llvm-svn: 128158

llvm-svn: 128157

Remove the redundant loads / stores to globals that we were generating for selectors (GNU runtimes).

llvm-svn: 128156

Each of these instructions may have a RegsClobberInsn entry that can't be
ignored. Consecutive ranges are coalesced later when DwarfDebug::emitDebugLoc
merges entries.

llvm-svn: 128155

X86. Fixes PR9533.

llvm-svn: 128154

- Fix bug in ADDRrr/ADDRri/ADDRii selection for 64-bit addresses
- Add comparison selection for i64
- Add zext selection for i32 -> i64
- Add shl/shr/sha support for i64

llvm-svn: 128153