llvm-svn: 47865

llvm-svn: 47857

llvm-svn: 47828

llvm-svn: 47800

llvm-svn: 47799

llvm-svn: 47798

Add lock prefix support to x86.  Also add the instructions necessary for the atomic ops.  They are still marked pseudo, since I cannot figure out what format to use, but they are the correct opcode.

llvm-svn: 47795

llvm-svn: 47770

llvm-svn: 47740

llvm-svn: 47736

llvm-svn: 47711

llvm-svn: 47704

llvm-svn: 47703

llvm-svn: 47702

provide TAI hook for selection of EH data emission format. Currently unused.

llvm-svn: 47699

llvm-svn: 47688

stack slot and store if the  SINT_TO_FP is actually legal.  This allows
us to compile:

double a(double b) {return (unsigned)b;}

to:

_a:
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	ret

instead of:

_a:
	subq	$8, %rsp
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	addq	$8, %rsp
	ret

crazy.

llvm-svn: 47660

llvm-svn: 47659

_test:
	movl	%edi, %eax
	ret

instead of:

_test:
        movl    $4294967295, %ecx
        movq    %rdi, %rax
        andq    %rcx, %rax
        ret

It would be great to write this as a Pat pattern that used subregs 
instead of a 'pseudo' instruction, but I don't know how to do that
in td files.

llvm-svn: 47658

llvm-svn: 47652

llvm-svn: 47635

would have been a Godsend here!

llvm-svn: 47625

llvm-svn: 47606

llvm-svn: 47600

GOT-style position independent code. Before only tail calls to
protected/hidden functions within the same module were optimized.
Now all function calls are tail call optimized.

llvm-svn: 47594

calls. Before arguments that could overwrite each other were
explicitly lowered to a stack slot, not giving the register allocator
a chance to optimize. Now a sequence of copyto/copyfrom virtual
registers ensures that arguments are loaded in (virtual) registers
before they are lowered to the stack slot (and might overwrite each
other). Also parameter stack slots are marked mutable for
(potentially) tail calling functions.

llvm-svn: 47593

pointed out that this isn't correct at -O0.

llvm-svn: 47575

llvm-svn: 47573

{S,U}MUL_LOHI with an unused high value.

llvm-svn: 47569

result into a MUL late in the X86 codegen process. ISD::MUL is
once again Legal on X86, so this is no longer needed. And, the
hack was suboptimal; see PR1874 for details.

llvm-svn: 47567

a SignBitIsZero function to simplify a common use case.

llvm-svn: 47561

of TokenFactor underneath chain (seems to be enough)

llvm-svn: 47554

llvm-svn: 47524

No need recognize load from a fixed argument slot as re-materializable. LiveIntervalAnalysis already handles it as a special case.

llvm-svn: 47522

stuff into ParamAttrsList.h.  Per feedback from
ParamAttrs changes.

llvm-svn: 47504

llvm-svn: 47483

llvm-svn: 47476

instead of with mmx registers.  This horribleness is apparently
done by gcc to avoid having to insert emms in places that really 
should have it.  This is the second half of rdar://5741668.

llvm-svn: 47474

GCC apparently does this, and code depends on not having to do
emms when this happens.  This is x86-64 only so far, second half
should handle x86-32.

rdar://5741668

llvm-svn: 47470

new things.

llvm-svn: 47458