Commits · 0feb0e60714ca4443409d05d1d8ae78260ada793 · Roger Ferrer / llvm-epi-0.8

May 28, 2009

"The instructions MMX_PSADBWrm and MMX_PSADBWrr have opcode 0b11100000 (e0), but · 0feb0e60

Bill Wendling authored May 28, 2009

the Intel manual (screenshot) says it should be 0b11110110 (f6).  The existing
encoding causes a disassembly conflict with MMX_PAVGBrm, which really should be
0f e0."

Patch by Sean Callanan!

llvm-svn: 72508

0feb0e60

Added optimization that narrow load / op / store and the 'op' is a bit... · a9cda8ab

Evan Cheng authored May 28, 2009

Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code.
e.g.
orl     $65536, 8(%rax)
=>
orb     $1, 10(%rax)

Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization.

llvm-svn: 72507

a9cda8ab

May 27, 2009
- Ger rid of some dead code. · a56159b7
  Eli Friedman authored May 27, 2009
```
llvm-svn: 72494
```
  a56159b7
- Fix sfence jit encoding. Patch by Sean Callanan. · 4db1631a
  Evan Cheng authored May 27, 2009
```
llvm-svn: 72488
```
  4db1631a
- Don't abuse the quirky behavior of LegalizeDAG for XINT_TO_FP and · acb851a8
  Eli Friedman authored May 27, 2009
```
FP_TO_XINT.  Necessary for some cleanups I'm working on.  Updated 
from the previous version (r72431) to fix a bug and make some things a 
bit clearer.

llvm-svn: 72445
```
  acb851a8
May 26, 2009

Back out r72431, it is causing a number of compilation crashes with clang. · d96b1178
Daniel Dunbar authored May 26, 2009
```
llvm-svn: 72436
```
d96b1178

Update CPU capabilities for AMD machines · 96180b53

Stefanus Du Toit authored May 26, 2009

- added processors k8-sse3, opteron-sse3, athlon64-sse3, amdfam10, and
barcelona with appropriate sse3/4a levels
- added FeatureSSE4A for amdfam10 processors
in X86Subtarget:
- added hasSSE4A
- updated AutoDetectSubtargetFeatures to detect SSE4A
- updated GetCurrentX86CPU to detect family 15 with sse3 as k8-sse3 and
family 10h as amdfam10

New processor names match those used by gcc.

Patch by Paul Redmond!

llvm-svn: 72434

96180b53

Don't abuse the quirky behavior of LegalizeDAG for XINT_TO_FP and · 8c7bff96
Eli Friedman authored May 26, 2009
```
FP_TO_XINT.  Necessary for some cleanups I'm working on. 

llvm-svn: 72431
```
8c7bff96

May 25, 2009
- add some late optimizations that GCC does. It thinks these are a win · 9b65031a
  Chris Lattner authored May 25, 2009
```
even on Core2, not just AMD processors which was a surprise to me.

llvm-svn: 72396
```
  9b65031a
- we should eventually add -march=atom and the new atom movbe instruction. · be31b7b5
  Chris Lattner authored May 25, 2009
```
llvm-svn: 72387
```
  be31b7b5
May 24, 2009
- Make the X86 backend mark EXTRACT_SUBVECTOR as Expand, at least for the · 2199ed39
  Eli Friedman authored May 23, 2009
```
moment.

llvm-svn: 72350
```
  2199ed39
May 23, 2009

Propagate CPU string out of SubtargetFeatures · 08bf4c0f
Anton Korobeynikov authored May 23, 2009
```
llvm-svn: 72335
```
08bf4c0f

Make the x86 backend custom-lower UINT_TO_FP and FP_TO_UINT on 32-bit · dfe4f253

Eli Friedman authored May 23, 2009

systems instead of attempting to promote them to a 64-bit SINT_TO_FP or 
FP_TO_SINT.  This is in preparation for removing the type legalization 
code from LegalizeDAG: once type legalization is gone from LegalizeDAG, 
it won't be able to handle the i64 operand/result correctly.

This isn't quite ideal, but I don't think any other operation for any 
target ends up in this situation, so treating this case specially seems 
reasonable.

llvm-svn: 72324

dfe4f253

May 20, 2009
- Try again. Allow call to immediate address for ELF or when in static relocation mode. · 96098337
  Evan Cheng authored May 20, 2009
```
llvm-svn: 72160
```
  96098337
- Cannot use immediate as call absolute target in PIC mode. · 61da1864
  Evan Cheng authored May 20, 2009
```
llvm-svn: 72154
```
  61da1864
May 18, 2009
- Add OpSize to 16-bit ADC and SBB. · 74503f0b
  Dale Johannesen authored May 18, 2009
```
llvm-svn: 72045
```
  74503f0b
- Fill in the missing patterns for ADC and SBB. · 1df0e803
  Dale Johannesen authored May 18, 2009
```
Some comment cleanup.

llvm-svn: 72022
```
  1df0e803
May 15, 2009
- Reflow to fit 80-col. · 35ea2c9a
  Mike Stump authored May 14, 2009
```
llvm-svn: 71813
```
  35ea2c9a
- Reflow to fit 80-col. · 13e4f10c
  Mike Stump authored May 14, 2009
```
llvm-svn: 71812
```
  13e4f10c
May 13, 2009

Run code placement optimization for targets that want it (arm and x86 for now). · ab0d2339
Evan Cheng authored May 13, 2009
```
llvm-svn: 71726
```
ab0d2339

Change MachineInstrBuilder::addReg() to take a flag instead of a list of · f7b83c7a

Bill Wendling authored May 13, 2009

booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.

I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).

llvm-svn: 71722

f7b83c7a

May 12, 2009
- More MSVC fixes -- class/struct conflicts. · 6b167d68
  Bill Wendling authored May 12, 2009
```
llvm-svn: 71601
```
  6b167d68
- 80 col violations. · b41de478
  Evan Cheng authored May 12, 2009
```
llvm-svn: 71582
```
  b41de478
- Avoid unneeded SIB byte encoding. Patch by Zoltan Varga. · 55173b76
  Evan Cheng authored May 12, 2009
```
llvm-svn: 71520
```
  55173b76
May 11, 2009
- Convert a subtract into a negate and an add when it helps x86 · faf75c8c
  Dan Gohman authored May 11, 2009
```
address folding.

llvm-svn: 71446
```
  faf75c8c
May 09, 2009

Rename PaddedSize to AllocSize, in the hope that this · af9eaa83

Duncan Sands authored May 09, 2009

will make it more obvious what it represents, and stop
it being confused with the StoreSize.

llvm-svn: 71349

af9eaa83

May 08, 2009

Factor out cycle-finder code and make it generic. · 65a58168
Anton Korobeynikov authored May 08, 2009
```
llvm-svn: 71241
```
65a58168
Fix PR4152: asm constraint validation happens before dag combine, so we · f1d9b914
Chris Lattner authored May 08, 2009
```
need to work a bit to combine things like (x+c1+c2) into x+c3.

llvm-svn: 71232
```
f1d9b914

Optimize code placement in loop to eliminate unconditional branches or move... · 2fa28110

Evan Cheng authored May 08, 2009

Optimize code placement in loop to eliminate unconditional branches or move unconditional branch to the outside of the loop. e.g.

///       A:                                                                                                                                                                 
///       ...                                                                                                                                                                
///       <fallthrough to B>                                                                                                                                                 
///                                                                                                                                                                          
///       B:  --> loop header                                                                                                                                                
///       ...                                                                                                                                                                
///       jcc <cond> C, [exit]                                                                                                                                               
///                                                                                                                                                                          
///       C:                                                                                                                                                                 
///       ...                                                                                                                                                                
///       jmp B                                                                                                                                                              
///                                                                                                                                                                          
/// ==>                                                                                                                                                                      
///                                                                                                                                                                          
///       A:                                                                                                                                                                 
///       ...                                                                                                                                                                
///       jmp B                                                                                                                                                              
///                                                                                                                                                                          
///       C:  --> new loop header                                                                                                                                            
///       ...                                                                                                                                                                
///       <fallthough to B>                                                                                                                                                  
///                                                                                                                                                                          
///       B:                                                                                                                                                                 
///       ...                                                                                                                                                                
///       jcc <cond> C, [exit] 

llvm-svn: 71209

2fa28110

May 06, 2009

Use X86AddrNumOperands instead of magic constant one · 72b6582c

Dale Johannesen authored May 06, 2009

more place.  This fixes a bunch of x86-64 JIT regressions.
(Introduced when the value of the magic constant changed
in 68645.  At the time apparently nobody noticed; failures
were hidden in 70343-70439 by an unrelated bug, so showed
up again as "new" failures in 70440.)

llvm-svn: 71106

72b6582c

May 05, 2009

Add basic support for code generation of · be9fa506
Chris Lattner authored May 05, 2009
```
addrspace(257) -> FS relative on x86.  Patch by Zoltan Varga!

llvm-svn: 70992
```
be9fa506

Revert part of 70929 that has to do with determining whether a SIB byte is... · a35aed56

Evan Cheng authored May 05, 2009

Revert part of 70929 that has to do with determining whether a SIB byte is needed. It causes a lot of x86_64 JIT failures.

llvm-svn: 70986

a35aed56

- Avoid the longer SIB encoding on x86_64 when it's not needed. · c298ccb9

Evan Cheng authored May 04, 2009

- Synchronize instruction length computation code in X86InstrInfo with code in X86CodeEmitter.cpp
Patch by Zoltan Varga.

llvm-svn: 70929

c298ccb9

May 04, 2009
- X86FastISel doesn't support the -tailcallopt ABI. · bb525f7e
  Dan Gohman authored May 04, 2009
```
llvm-svn: 70902
```
  bb525f7e
May 01, 2009
- Fix compilation for some targets other than x86. · 31af6179
  Argyrios Kyrtzidis authored Apr 30, 2009
```
llvm-svn: 70522
```
  31af6179
- Make DebugLoc independent of DwarfWriter. · a5037484
  Argyrios Kyrtzidis authored Apr 30, 2009
```
-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable*
-Remove DwarfWriter::getOrCreateSourceID
-Make necessary changes for the above (fix callsites, etc.)

llvm-svn: 70520
```
  a5037484
Apr 30, 2009
- Set mayLoad on MOVZX32_NOREXrm8 too. · db3a57ec
  Dan Gohman authored Apr 30, 2009
```
llvm-svn: 70466
```
  db3a57ec
- Mark MOV8mr_NOREX and MOV8rm_NOREX as mayStore / mayLoad respectively. · 99578674
  Evan Cheng authored Apr 30, 2009
```
llvm-svn: 70461
```
  99578674
- Instead of passing in an unsigned value for the optimization level, use an enum, · 026e5d76
  Bill Wendling authored Apr 29, 2009
```
which better identifies what the optimization is doing. And is more flexible for
future uses.

llvm-svn: 70440
```
  026e5d76
- Fix infinite recursion in the C++ code which handles movddup by making it unnecessary. · 7e6e3527
  Nate Begeman authored Apr 29, 2009
```
llvm-svn: 70425
```
  7e6e3527