instead of as a single element list with VoidTy.  Now with a fix
for the verifier.

llvm-svn: 99206

MC: Change MCObjectWriter::RecordRelocation to take an MCFragment (instead of a MCDataFragment). Object files should only need the generic MCFragment features.

llvm-svn: 99205

llvm-svn: 99204

llvm-svn: 99203

llvm-svn: 99202

llvm-svn: 99201

it allocates to DwarfDebug::DIEValues.

llvm-svn: 99196

llvm-svn: 99195

llvm-svn: 99192

corresponding NEON instructions, instead of operation they are currently
used for.

llvm-svn: 99189

llvm-svn: 99187

specify encoding bits in arguments instead of "let" expressions.

llvm-svn: 99185

Thanks, Chris!

llvm-svn: 99183

llvm-svn: 99182

llvm-svn: 99171

we can reapply the InvokeInst operand reordering patch. (see r98957).

llvm-svn: 99170

by dropping all references from all constants that can use other
constants before trying to destroy any of them.

I also had to free bugpoint's Module in ~BugDriver().

llvm-svn: 99160

where FoldingSet<MDNode> is instantiated.  Clang and MSVC complain; gcc
doesn't.

llvm-svn: 99147

llvm-svn: 99146

Fixes PR803.

llvm-svn: 99143

llvm-svn: 99113

MC/X86: Fix an MCOperand link, when we parsing shrld $1,%eax and friends; I believe this fixes the last memory leaks under test/MC.

llvm-svn: 99102

llvm-svn: 99097

Patch by John Tytgat!

llvm-svn: 99096

with changes to add a separate optional register update argument.  Change all
the NEON instructions with address register writeback to use it.

llvm-svn: 99095

address register writeback.

llvm-svn: 99094

rewrite the existing VST3 and VST4 instructions to use the same classes as
the others.

llvm-svn: 99093

writeback, and refactor the existing double-spaced VST2 instructions.
These are only for the disassembler since codegen doesn't use them, at
least for now.

llvm-svn: 99090

and use this (as well as getCalledValue) to access the callee,
instead of {g|s}etOperand(0).

llvm-svn: 99084

llvm-svn: 99083

address register writeback.

llvm-svn: 99082

llvm-svn: 99081

rewrite the existing VLD3 and VLD4 instructions to use the same classes as
the others.

llvm-svn: 99080

llvm-svn: 99078

load/stores with address register writeback, and use "odd" suffix to distinguish
instructions to access odd numbered registers (instead of "a" and "b").
No functional changes.

llvm-svn: 99066

writeback, and refactor the existing double-spaced VLD2 instructions.
These are only for the disassembler since codegen doesn't use them, at
least for now.

llvm-svn: 99065

llvm-svn: 99062

PIC16: Simplify code by using a std::set<std::string> instead of a sorted & uniqued std::list of leaked char*.

llvm-svn: 99061

--- Reverse-merging r98679 into 'lib/Target/ARM/ARMInstrVFP.td':
U    lib/Target/ARM/ARMInstrVFP.td

llvm-svn: 99049

load/store optimizer would incorrectly think that registers D26 and D28
were consecutive and would generate a VLDM instruction to load them.
The assembler was not convinced.

llvm-svn: 99043