- Dec 20, 2012
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Akira Hatanaka authored
llvm-svn: 170660
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Akira Hatanaka authored
Separate encoding information from the rest. llvm-svn: 170659
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Akira Hatanaka authored
Separate encoding information from the rest. llvm-svn: 170657
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Reed Kotler authored
these patches are tested a lot by test-suite but make check tests are forthcoming once the next few patches that complete this are committed. with the next few patches the pass rate for mips16 is near 100% llvm-svn: 170656
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Akira Hatanaka authored
physical register $r1 to $r0. GNU disassembler recognizes an "or" instruction as a "move", and this change makes the disassembled code easier to read. Original patch by Reed Kotler. llvm-svn: 170655
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Akira Hatanaka authored
the end. llvm-svn: 170651
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Akira Hatanaka authored
information from the rest. llvm-svn: 170650
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Akira Hatanaka authored
from the rest. llvm-svn: 170649
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Akira Hatanaka authored
Separate encoding information from the rest. llvm-svn: 170648
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Akira Hatanaka authored
information from the rest. llvm-svn: 170647
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Akira Hatanaka authored
ArithLogicI as the instruction base classes. llvm-svn: 170642
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- Dec 19, 2012
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Roman Divacky authored
llvm-svn: 170578
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Reed Kotler authored
llvm-svn: 170493
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- Dec 16, 2012
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Reed Kotler authored
Mips16 is really a processor decoding mode (ala thumb 1) and in the same program, mips16 and mips32 functions can exist and can call each other. If a jal type instruction encounters an address with the lower bit set, then the processor switches to mips16 mode (if it is not already in it). If the lower bit is not set, then it switches to mips32 mode. The linker knows which functions are mips16 and which are mips32. When relocation is performed on code labels, this lower order bit is set if the code label is a mips16 code label. In general this works just fine, however when creating exception handling tables and dwarf, there are cases where you don't want this lower order bit added in. This has been traditionally distinguished in gas assembly source by using a different syntax for the label. lab1: ; this will cause the lower order bit to be added lab2=. ; this will not cause the lower order bit to be added In some cases, it does not matter because in dwarf and debug tables the difference of two labels is used and in that case the lower order bits subtract each other out. To fix this, I have added to mcstreamer the notion of a debuglabel. The default is for label and debug label to be the same. So calling EmitLabel and EmitDebugLabel produce the same result. For various reasons, there is only one set of labels that needs to be modified for the mips exceptions to work. These are the "$eh_func_beginXXX" labels. Mips overrides the debug label suffix from ":" to "=." . This initial patch fixes exceptions. More changes most likely will be needed to DwarfCFException to make all of this work for actual debugging. These changes will be to emit debug labels in some places where a simple label is emitted now. Some historical discussion on this from gcc can be found at: http://gcc.gnu.org/ml/gcc-patches/2008-08/msg00623.html http://gcc.gnu.org/ml/gcc-patches/2008-11/msg01273.html llvm-svn: 170279
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- Dec 15, 2012
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Reed Kotler authored
In this case, essentially it is soft float with different library routines. The next step will be to make this fully interoperational with mips32 floating point and that requires creating stubs for functions with signatures that contain floating point types. I have a more sophisticated design for mips16 hardfloat which I hope to implement at a later time that directly does floating point without the need for function calls. The mips16 encoding has no floating point instructions so one needs to switch to mips32 mode to execute floating point instructions. llvm-svn: 170259
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- Dec 13, 2012
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Patrik Hagglund authored
Accordingly, add helper funtions getSimpleValueType (in parallel to getValueType) in SDValue, SDNode, and TargetLowering. This is the first, in a series of patches. This is the second attempt. In the first attempt (r169837), a few getSimpleVT() were hoisted too far, detected by bootstrap failures. llvm-svn: 170104
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Akira Hatanaka authored
internal linkage. llvm-svn: 170092
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Akira Hatanaka authored
No functionality change. llvm-svn: 170084
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Akira Hatanaka authored
No functionality change. llvm-svn: 170080
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Akira Hatanaka authored
No functionality change. llvm-svn: 170077
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Akira Hatanaka authored
No functionality change. llvm-svn: 170076
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Akira Hatanaka authored
No functionality change. llvm-svn: 170075
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Akira Hatanaka authored
No functionality change. llvm-svn: 170073
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Akira Hatanaka authored
No functionality change. llvm-svn: 170072
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Akira Hatanaka authored
No functionality change. llvm-svn: 170071
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Akira Hatanaka authored
No functionality change. llvm-svn: 170069
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Akira Hatanaka authored
and separate encoding information from the rest. llvm-svn: 170066
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Akira Hatanaka authored
MipsInstrFPU.td. llvm-svn: 170061
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Akira Hatanaka authored
llvm-svn: 170060
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Akira Hatanaka authored
llvm-svn: 170057
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Akira Hatanaka authored
FFR2P_M. llvm-svn: 170055
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Akira Hatanaka authored
llvm-svn: 170054
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Akira Hatanaka authored
FFR1_W_M and FFR1P_M. The new instruction definitions have one-to-one correspondence with the instructions in the ISA manual. llvm-svn: 170053
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- Dec 12, 2012
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Akira Hatanaka authored
llvm-svn: 170012
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Evan Cheng authored
mention the inline memcpy / memset expansion code is a mess? This patch split the ZeroOrLdSrc argument into two: IsMemset and ZeroMemset. The first indicates whether it is expanding a memset or a memcpy / memmove. The later is whether the memset is a memset of zero. It's totally possible (likely even) that targets may want to do different things for memcpy and memset of zero. llvm-svn: 169959
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Evan Cheng authored
Also added more comments to explain why it is generally ok to return true. - Rename getOptimalMemOpType argument IsZeroVal to ZeroOrLdSrc. It's meant to be true for loaded source (memcpy) or zero constants (memset). The poor name choice is probably some kind of legacy issue. llvm-svn: 169954
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- Dec 11, 2012
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Patrik Hagglund authored
llvm-svn: 169854
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Patrik Hagglund authored
Accordingly, add helper funtions getSimpleValueType (in parallel to getValueType) in SDValue, SDNode, and TargetLowering. This is the first, in a series of patches. llvm-svn: 169837
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NAKAMURA Takumi authored
llvm-svn: 169819
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Evan Cheng authored
1. Teach it to use overlapping unaligned load / store to copy / set the trailing bytes. e.g. On 86, use two pairs of movups / movaps for 17 - 31 byte copies. 2. Use f64 for memcpy / memset on targets where i64 is not legal but f64 is. e.g. x86 and ARM. 3. When memcpy from a constant string, do *not* replace the load with a constant if it's not possible to materialize an integer immediate with a single instruction (required a new target hook: TLI.isIntImmLegal()). 4. Use unaligned load / stores more aggressively if target hooks indicates they are "fast". 5. Update ARM target hooks to use unaligned load / stores. e.g. vld1.8 / vst1.8. Also increase the threshold to something reasonable (8 for memset, 4 pairs for memcpy). This significantly improves Dhrystone, up to 50% on ARM iOS devices. rdar://12760078 llvm-svn: 169791
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