llvm-svn: 53389

llvm-svn: 53378

makes their special-case checks of use_size() less beneficial,
so remove them. This eliminates all but one use of use_size(),
which is in AssignTopologicalOrder, which uses it only once for
each node, and so can reasonably afford to recompute it, as
this allows the UsesSize field of SDNode to be removed
altogether.

llvm-svn: 53377

of examining every operand of every user.

llvm-svn: 53374

getMemOperand function to be moved into the base class as well
and made non-virtual.

llvm-svn: 53372

llvm-svn: 53369

Loosen our check here.  Local regalloc only cares that the reg is used and def'd by the same instruction, but about the details of
the relationship.

llvm-svn: 53367

class, and store IsVolatile and Alignment in a more compact form.
This makes AtomicSDNode slightly larger, but it shrinks LoadSDNode
and StoreSDNode, which are much more common and are the largest of
the SDNode subclasses. Also, this lets the isVolatile() and
getAlignment() accessors be non-virtual.

llvm-svn: 53361

Don't use an expensive check for two-address-ness when we have the information sitting around to determine it much more quickly,
This speeds up the local register allocator from 0.37s to 0.31s on instcombine.

llvm-svn: 53359

llvm-svn: 53352

Keep RegAllocSimple in sync.

llvm-svn: 53351

with RegAllocLocal.

llvm-svn: 53347

of having local variables duplicate it.

llvm-svn: 53346

with extra checks.

llvm-svn: 53344

llvm-svn: 53316

llvm-svn: 53289

SINT_TO_FP and UINT_TO_FP.  This now produces
the same code as LegalizeDAG (the previous
code was based on a mistaken idea of what
LegalizeDAG did in this case).

llvm-svn: 53288

loads.

llvm-svn: 53287

FP_TO_UINT.

llvm-svn: 53286

llvm-svn: 53285

note since it is not clear whether it is correct.

llvm-svn: 53284

llvm-svn: 53281

functions and junk.

llvm-svn: 53279

llvm-svn: 53264

parent is non-null. It now always is.

llvm-svn: 53263

llvm-svn: 53262

available to getAtomic in addition to just getLoad and getStore,
to prevent MachineMemOperands with 0 alignment.

llvm-svn: 53261

Fix the build.  Apparently MachineInstr& is no longer implicitly convertable to MachineBasicBlock::iterator.

llvm-svn: 53260

rather than depending on LiveVariables.  This decreases compile time from:
0.5909s (LV + Regalloc) to 0.421s (just regalloc).

llvm-svn: 53256

llvm-svn: 53253

Do not CSE DEBUG_LOC, DBG_LABEL, DBG_STOPPOINT, DECLARE, and EH_LABEL SDNode's. This improves compile time slightly at -O0 -g.

llvm-svn: 53246

soft float: experiments show that targets aren't
expecting this for results or for operands.  Add
support select/select_cc result soft float and
correct operand soft float for these.

llvm-svn: 53245

in LegalizeTypes.

llvm-svn: 53244

llvm-svn: 53237

soft float.

llvm-svn: 53231

llvm-svn: 53215

MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

llvm-svn: 53212

and reused across SelectionDAGs.

This drastically reduces the number of calls to malloc/free made during
instruction selection, and improves memory locality.

llvm-svn: 53211

llvm-svn: 53206

llvm-svn: 53202