Very sorry for the accidental commit of WIP code.

llvm-svn: 132745

namespace set algorithm (re-)introduced. We may not have seen the 'std'
namespace, but we should still suggested associated namespaces. Easy
fix, but a bit annoying to test.

llvm-svn: 132744

llvm-svn: 132743

operands to an early clobber register. This fixes <rdar://problem/9566076>.

llvm-svn: 132738

rdar://problem/9037836

llvm-svn: 132737

may pick it up. This would create bad text relocations.

llvm-svn: 132736

Fixes PR10095.

llvm-svn: 132735

llvm-svn: 132734

llvm-svn: 132732

declared __weak objc-gc mode.  // rdar://9666091.

llvm-svn: 132731

llvm-svn: 132730

llvm-svn: 132729

llvm-svn: 132726

llvm-svn: 132725

- Fix indentation.
- Move comments.
- Fit lines in 80 columns.
- Remove dead code.

llvm-svn: 132724

the LIBCXXABI_ARMEABI macro.

llvm-svn: 132723

llvm-svn: 132718

llvm-svn: 132717

Requested by nbjoerg!

llvm-svn: 132716

llvm-svn: 132715

llvm-svn: 132711

-undef flag is passed in. Also __ASSEMBLER__ with -x assembler-with-cpp. (Don't
ask.)

llvm-svn: 132708

Switched to DenseMap for allowed sets in PBQP. Reduces total LLC time by 15% on CINT2006 for x86-32.

llvm-svn: 132707

codegen. Thanks Galina.

llvm-svn: 132706

specializations within an explicit instantiation to default to off
(enabled by -pedantic). Nobody else seem to implement C++
[temp.explicit]p3. Fixes PR10093.

llvm-svn: 132704

Add test case for C++ exception handling and fix the following mistakes in MipsFrameLowering::emitPrologue:

- cfi directives are not inserted at the right location or in the right order.
- The source MachineLocation for the cfi directive that changes the cfa register
  to $fp should be MachineLocation::VirtualFP.
- A PROLOG_LABEL that marks the beginning of cfi_offset directives for
  callee-saved register is emitted even when no callee-saved registers are
  saved.
- When a callee-saved double precision register is saved, two cfi_offset
  directives, one for each of the paired single precision registers, should be
  emitted.
 
 

llvm-svn: 132703

I've been sitting on this long enough trying to find a test case. I
think the fix should go in now, but I'll keep working on the test case.

llvm-svn: 132701

llvm-svn: 132700

rdar://problem/9556069

llvm-svn: 132699

When local live range splitting creates a live range with the same
number of instructions as the old range, mark it as RS_Local. When such
a range is seen again, require that it be split in a way that reduces
the number of instructions. That guarantees we are making progress while
still being able to perform 3 -> 2+3 splits as required by PR10070.

This also means that the PrevSlot map is no longer needed. This was also
used to estimate new spill weights, but that is no longer necessary
after slotIndexes::insertMachineInstrInMaps() got the extra Late
insertion argument.

llvm-svn: 132697

load.  rdar://problem/6373334

llvm-svn: 132696

Add -O1/2/3 to bugpoint, so when you conclude opt -O2 reproduces an issue, you can just run bugpoint -O2. :)  My implementation isn't precisely equivalent to what opt does, but as far as I can tell, it's close enough.

llvm-svn: 132695

llvm-svn: 132694

llvm-svn: 132693

llvm-svn: 132692

llvm-svn: 132691

Only target-dependent hints require callbacks. The RCI allocation order
has CSR aliases last according to their order of appearance in the
getCalleeSavedRegs list. This can depend on the calling convention.

This way, AllocationOrder::next doesn't have to check for reserved
registers, and CSRs are always allocated last, even with weird calling
conventions.

llvm-svn: 132690

legalize SDNodes such as BUILD_VECTOR, EXTRACT_VECTOR_ELT, etc.

llvm-svn: 132689

llvm-svn: 132687

it was added, the test has regressed, so XFAIL it.

llvm-svn: 132686