Commits · 2915b3988f4445244c3c09414500232b3ccaa416 · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

Jul 02, 2019
- [Object/invalid.test] - Convert 3 more sub-tests to YAML · 2915b398
  George Rimar authored Jul 02, 2019
  2915b398
- [mips] Mark P5600 scheduling model as complete · 1d7d0e21
  Simon Atanasyan authored Jul 02, 2019
  1d7d0e21
- [mips] Add missing schedinfo for FPU load/store/conv instructions · f2867518
  Simon Atanasyan authored Jul 02, 2019
  f2867518
- [mips] Map SNOP, NOP to the P5600Nop scheduler resource · 116cf95c
  Simon Atanasyan authored Jul 02, 2019
  116cf95c
- [yaml2obj] - Allow overriding sh_offset field from the YAML. · 9df825f4
  George Rimar authored Jul 02, 2019
  9df825f4
- [NFC][InstCombine] Revisit tests for "redundant shift input masking" (PR42456) · 7928fea4
  Roman Lebedev authored Jul 02, 2019
  7928fea4
- [DWARF] Simplify dumping of a .debug_addr section. · c310b1aa
  Igor Kudrin authored Jul 02, 2019
  c310b1aa
- [NFC][InstCombine] Add tests for "redundant shift input masking" (PR42456) · 377dfb02
  Roman Lebedev authored Jul 02, 2019
  377dfb02
- [TailDuplicator] Fix copy instruction emitting into the wrong block. · 000ef2c2
  Amara Emerson authored Jul 02, 2019
  000ef2c2
- [X86] Add PreprocessISelDAG support for turning ISD::FP_TO_SINT/UINT into... · 2d306b2d
  Craig Topper authored Jul 02, 2019
  2d306b2d
- [PowerPC] Implement the areMemAccessesTriviallyDisjoint hook · 7fdb3a29
  QingShan Zhang authored Jul 02, 2019
  7fdb3a29
- [DAGCombiner] Exploiting more about the transformation of TransformFPLoadStorePair function · 7ae536a1
  Zi Xuan Wu authored Jul 02, 2019
  7ae536a1
- Revert Recommit [PowerPC] Update P9 vector costs for insert/extract element · 351b7e7b
  Jordan Rupprecht authored Jul 01, 2019
  351b7e7b
- [cmake] With utils disabled, don't build tblgen in cross mode · a7f00941
  Keno Fischer authored Jul 01, 2019
  a7f00941
- [PGO] Update ICP pass for recent byval type changes · d7216394
  Reid Kleckner authored Jul 01, 2019
  d7216394
- AMDGPU: Correct properties for adjcallstack* pseudos · 40c08052
  Matt Arsenault authored Jul 01, 2019
  40c08052
- Fix broken C++ mode comment · 1410e869
  Matt Arsenault authored Jul 01, 2019
  1410e869
- [InstCombine][NFCI] Update test cases in onehot_merge.ll · 8e1051b3
  Huihui Zhang authored Jul 01, 2019
  8e1051b3
- [InstCombine] reduce more checks for power-of-2-or-zero using ctpop · ddc1b40f
  Sanjay Patel authored Jul 01, 2019
  ddc1b40f
Jul 01, 2019
- [X86] Use v4i32 vzloads instead of v2i64 for vpmovzx/vpmovsx patterns where... · 3f722d40
  Craig Topper authored Jul 01, 2019
  3f722d40
- [mips] Add missing schedinfo for MIPSeh_return[32|64] instructions · fa275006
  Simon Atanasyan authored Jul 01, 2019
  fa275006
- [mips] Add virtualization ASE to P5600 scheduling definitions · 29801f78
  Simon Atanasyan authored Jul 01, 2019
  29801f78
- [mips] Add missing schedinfo for LONG_BRANCH_* instructions · 574d0a61
  Simon Atanasyan authored Jul 01, 2019
  574d0a61
- [X86] Remove several bad load folding isel patterns for VPMOVZX/VPMOVSX. · 328b2415
  Craig Topper authored Jul 01, 2019
  328b2415
- Revert [SLP] Look-ahead operand reordering heuristic. · a7972dc0
  Jordan Rupprecht authored Jul 01, 2019
  a7972dc0
- [NFC][InstCombine] More commutative tests for "shift direction in bittest" (PR42466) · 975120a2
  Roman Lebedev authored Jul 01, 2019
  975120a2
- Testing commit access through minor formatting change · 8b7a0baa
  Nilanjana Basu authored Jul 01, 2019
  8b7a0baa
- GlobalISel: Try to widen merges with other merges · c9f14f29
  Matt Arsenault authored Jul 01, 2019
  c9f14f29
- AMDGPU: Revert accidental change to test · 73dec22c
  Matt Arsenault authored Jul 01, 2019
  73dec22c
- [X86] Correct v4f32->v2i64 cvt(t)ps2(u)qq memory isel patterns · 5e7815b6
  Craig Topper authored Jul 01, 2019
  5e7815b6
- AMDGPU/GlobalISel: Handle more input argument intrinsics · bae3636f
  Matt Arsenault authored Jul 01, 2019
  bae3636f
- AMDGPU/GlobalISel: Lower kernarg segment ptr intrinsics · 9e8e8c60
  Matt Arsenault authored Jul 01, 2019
  9e8e8c60
- AMDGPU/GlobalISel: Legalize workgroup ID intrinsics · 756d8190
  Matt Arsenault authored Jul 01, 2019
  756d8190
- AMDGPU/GlobalISel: Legalize workitem ID intrinsics · e2c86cce
  Matt Arsenault authored Jul 01, 2019
  e2c86cce
- AMDGPU/GlobalISel: Custom lower control flow intrinsics · e15770ae
  Matt Arsenault authored Jul 01, 2019
  e15770ae
- AMDGPU/GlobalISel: Handle 16-bit SALU min/max · 4073b337
  Matt Arsenault authored Jul 01, 2019
  4073b337
- AMDGPU/GlobalISel: Lower SALU min/max to cmp+select · 5a7d5111
  Matt Arsenault authored Jul 01, 2019
  5a7d5111
- [X86] Avoid SFB - Fix inconsistent codegen with/without debug info(2) · e20030f6
  Robert Lougher authored Jul 01, 2019
  e20030f6
- AMDGPU/GlobalISel: Add tests for add legalization · 7f8c7209
  Matt Arsenault authored Jul 01, 2019
  7f8c7209
- AMDGPU/GlobalISel: Legalize s16 add/sub/mul · ef59cb69
  Matt Arsenault authored Jul 01, 2019
  ef59cb69