llvm-svn: 96779

llvm-svn: 96778

llvm-svn: 96777

llvm-svn: 96776

SSE min and max instructions. The real thing this code needs to be
concerned about is negative zero.

Update the sse-minmax.ll test accordingly, and add tests for
-enable-unsafe-fp-math mode as well.

llvm-svn: 96775

induction variable value and a loop-variant value, don't force the
insert position to be at the post-increment position, because it may
not be dominated by the loop-variant value. This fixes a
use-before-def problem noticed on PPC.

llvm-svn: 96774

llvm-svn: 96771

CodeGen/X86/pr2182.ll.  Down to 13 x86 failures out of ~1100

llvm-svn: 96770

create an X86ISD::Cmp node with result type i64 on the 
CodeGen/X86/shift-i256.ll testcase and the new isel was assert on it
downstream.

llvm-svn: 96768

result nodes correctly.  Note that this includes a horrible hack
in DAGISelHeader which cannot be fixed reasonably without 
eliminating (parallel) from input patterns.  That, in turn,
can't be done until we support writing multiple result patterns
for the X86and_flag and related multiple-result nodes.

llvm-svn: 96767

llvm-svn: 96763

llvm-svn: 96762

llvm-svn: 96761

llvm-svn: 96758

DAGISelEmitter does.  This fixes 11 arm failures (8 
left).

llvm-svn: 96757

llvm-svn: 96756

It turned out that we failed to emit proper symbol stubs on non-x86/darwin for ages (we emitted a reference to a stub, but no stub was emitted). The code inside x86-32/macho target objfile lowering should actually be the generic one - move it there.

This (I really, really hope) should fix EH issues on ppc/darwin
and arm/darwin.

llvm-svn: 96755

MVT::iPTR.

llvm-svn: 96753

llvm-svn: 96752

utility.  Down to 6 ppc failures.

llvm-svn: 96751

<4 x i32> with <4 x float> values if they end up the same
register class.  This gets us up to 231 passes on the ppc
tests (only 7 fails).

llvm-svn: 96750

syntax.

llvm-svn: 96748

least cost matches.  This gets us from 195 -> 208 passes on the ppc codegen tests.

llvm-svn: 96747

and another taking a raw_ostream, but otherwise identical.  Use raw_ostream everywhere.

llvm-svn: 96746

llvm-svn: 96745

This changes the stack overflow in PR6363 to an assertion failure.

llvm-svn: 96744

This fixes PR6348

llvm-svn: 96734

sync with the top of stack.  This fixes a bunch of failures on larger
testcases.

llvm-svn: 96732

llvm-svn: 96731

llvm-svn: 96730

llvm-svn: 96728

With this, the matcher actually works reasonably well, but
crashes on larger examples in the scheduler.

llvm-svn: 96727

body before the push.

llvm-svn: 96726

llvm-svn: 96725

of the matched pattern to use the newly created node results.  Onto
the "making it actually work" phase!

llvm-svn: 96724

llvm-svn: 96720

handled in ARMInstPrinter.cpp.

And added PLD/PLDW/PLI (Preload Data/Instruction) for disassembly only.

llvm-svn: 96719

2GB-aligned stack anyway? 256 bytes is plenty. Requested by Chris.

llvm-svn: 96718

llvm-svn: 96717

the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization 
etc).

More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.

In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.

llvm-svn: 96716