the LDR instructions have. This makes the literal/register forms of the
instructions explicit and allows us to assign scheduling itineraries
appropriately. rdar://8477752

llvm-svn: 117505

for specifying fractional bits for fixed point conversions.

llvm-svn: 117501

llvm-svn: 117496

llvm-svn: 117495

llvm-svn: 117494

llvm-svn: 117485

llvm-svn: 117483

elements than the result vector type.  So, when an instruction like:

%8 = shufflevector <2 x float> %4, <2 x float> %7, <4 x i32> <i32 1, i32 0, i32 3, i32 2>

is translated to a DAG, each operand is changed to a concat_vectors node that appends 2 undef elements.  That is:

shuffle [a,b], [c,d] is changed to:
shuffle [a,b,u,u], [c,d,u,u]

That's probably the right thing for x86 but for NEON, we'd much rather have:

shuffle [a,b,c,d], undef

Teach the DAG combiner how to do that transformation for ARM.  Radar 8597007.

llvm-svn: 117482

llvm-svn: 117481

llvm-svn: 117478

llvm-svn: 117477

llvm-svn: 117475

llvm-svn: 117474

There are currently 100 references to COFF::IMAGE_SCN in 6 files
and 11 different functions. Section to attribute mapping really
needs to happen in one place to avoid problems like this.

llvm-svn: 117473

llvm-svn: 117472

llvm-svn: 117471

llvm-svn: 117462

operands in the TableGen'erated bits, so we don't need to do the additional
magic explicitly.

llvm-svn: 117461

llvm-svn: 117459

llvm-svn: 117458

encoding tricks. Handle the 'imm doesn't fit in the insn' case.

llvm-svn: 117454

llvm-svn: 117453

llvm-svn: 117451

contained in the ELF object writer.

llvm-svn: 117448

llvm-svn: 117447

llvm-svn: 117443

catch(...) is used in Win32/Signals.inc for catching Win32 structured
exceptions, but according to [1], this is wrong.

We can't simply change try/catch to __try/__finally, since this syntax is not
supported by MinGW. We can use __try/__finally on MSVC and __try1/__except1
macros on MinGW [2], but I think that that solution obfuscates the code too
much.

The use of try/catch(...) in Signals.inc makes it impossible to link
MinGW-compiled libSystem with llvm-gcc compiled executables. I propose that we
just remove try/catch(...) from Signals.inc, since the meaning of the code won't
change.

[1] http://members.cox.net/doug_web/eh.htm
[2] http://article.gmane.org/gmane.comp.compilers.llvm.cvs/81315

llvm-svn: 117442

(still to add ud2b).

llvm-svn: 117435

the wait prefix).

llvm-svn: 117434

sense, when the instruction takes the 16-bit ax register or m16 memory
location.  These changes to llvm-mc matches what the darwin assembler
allows for these instructions.  Done differently than in r117031 that
caused a valgrind error which was later reverted.

llvm-svn: 117433

integer values), not with the addrmode2 encoding.

llvm-svn: 117429

will accept versions that the darwin assembler allows.  Forms ending in "pi" and
forms without all the operands.

llvm-svn: 117427

live out.

This doesn't prevent us from inserting a loop preheader later on, if that is
better.

llvm-svn: 117424

Critical edges going into a loop are not as bad as critical exits. We can handle
them by splitting the critical edge, or by having both inside and outside
registers live out of the predecessor.

llvm-svn: 117423

Only virtuals should be requires to be connected.

llvm-svn: 117422

doesn't need the additional addrmode2 register operand. Missed it the first
time around.

llvm-svn: 117421

llvm-svn: 117420

rdar://8477752.

llvm-svn: 117419

llvm-svn: 117418

memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet).  No functional change except
for dump output.

llvm-svn: 117413