This can happen when widening a virtual register to a super-register
class.

llvm-svn: 156867

There is no need to look at an always null SrcIdx.

llvm-svn: 156866

this gives a speedup of > 80 in a debug build in the test case of PR12825 (php_sha512_crypt_r)

llvm-svn: 156849

Now both SrcReg and DstReg can be sub-registers of the final coalesced
register.

CoalescerPair::setRegisters still rejects such copies because
RegisterCoalescer doesn't yet handle them.

llvm-svn: 156848

This feature avoids creating edges in the scheduler's dependence graph
for non-aliasing memory operations according to whichever alias
analysis is available. It has been fully tested in Hexagon. Before
making this default, it needs to be extended to handle multiple
MachineMemOperands, compile time needs more evaluation, and
benchmarking on X86 and ARM is needed.

Patch by Sergei Larin!

llvm-svn: 156842

Add the MCRegisterInfo to the factories and constructors.

Patch by Tom Stellard <Tom.Stellard@amd.com>.

llvm-svn: 156828

minor simplification to code: Ty is already a SCEV type; don't need to run getEffectiveSCEVType() twice

llvm-svn: 156823

llvm-svn: 156815

llvm-svn: 156808

SelectionDAGBuilder::Clusterify : main functinality was replaced with CRSBuilder::optimize, so big part of Clusterify's code was reduced.

llvm-svn: 156804

resolved.

llvm-svn: 156801

llvm-svn: 156791

The purpose of this option is to silence error messages issued by machine
verifier passes and enable them to run to the end. If this option is not
provided, -verify-machineinstrs complains when it discovers there is a
non-terminator instruction (an instruction that is in a delay slot) after the
first terminator in a basic block.

llvm-svn: 156790

llvm-svn: 156787

Found by GCC's maybe-uninitialized.

llvm-svn: 156780

This should unbreak llvm-x86_64-linux.

llvm-svn: 156778

RAFast must add an <imp-def> operand when it is rewriting a sub-register
def that isn't a read-modify-write.

llvm-svn: 156777

so that it can be reused in MemCpyOptimizer.  This analysis is needed to remove
an unnecessary memcpy when returning a struct into a local variable.
rdar://11341081
PR12686

llvm-svn: 156776

llvm-svn: 156775

llvm-svn: 156774

llvm-svn: 156757

llvm-svn: 156755

Found by valgrind.

llvm-svn: 156744

llvm-svn: 156716

for nesting.

llvm-svn: 156714

llvm-svn: 156712

Based on a patch by Team PaX.

llvm-svn: 156709

Patch by Team PaX!

llvm-svn: 156708

llvm-svn: 156707

Based on a patch from PaX Team.

llvm-svn: 156706

Based on a patch from PaX Team.

llvm-svn: 156705

Ordinary patch for PR1255.
Added new case-ranges orientated methods for adding/removing cases in SwitchInst. After this patch cases will internally representated as ConstantArray-s instead of ConstantInt, externally cases wrapped within the ConstantRangesSet object.
Old methods of SwitchInst are also works well, but marked as deprecated. So on this stage we have no side effects except that I added support for case ranges in BitcodeReader/Writer, of course test for Bitcode is also added. Old "switch" format is also supported.

llvm-svn: 156704

the address of a function.

llvm-svn: 156703

llvm-svn: 156700

llvm-svn: 156698

llvm-svn: 156696

the ones that get or set the frame index for the $gp save slot. 

Remove the piece of code in MipsFunctionInfo::getGlobalBaseReg() which returns
GP. This function should always return a virtual register.

llvm-svn: 156695

is the $gp save slot.

llvm-svn: 156694

llvm-svn: 156693

- Stop creating stack frame objects needed for saving $gp.
- Insert a node that copies the global pointer register to register $gp
  before the call node. This will ensure $gp is valid at the entry of the
  called function.

llvm-svn: 156692