Commits · 43407fe6331cff494f3c1908f9c9efd591b43289 · Roger Ferrer / llvm-epi-0.8

May 20, 2011
- Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility. · 0bf26746
  Benjamin Kramer authored May 20, 2011
```
llvm-svn: 131730
```
  0bf26746
- Don't attempt to tail call optimize for Win64. · 552f8c48
  Chad Rosier authored May 20, 2011
```
llvm-svn: 131709
```
  552f8c48
- Revert r131664 and fix it in instcombine instead. rdar://9467055 · e8d2e9eb
  Evan Cheng authored May 20, 2011
```
llvm-svn: 131708
```
  e8d2e9eb
- Add fast-isel support for zeroext and signext ret instructions on x86. · 22da7994
  Eli Friedman authored May 19, 2011
```
llvm-svn: 131689
```
  22da7994
May 19, 2011
- Oddly people want to use the 'r' constraint for fp constants on x86. · 4014e5e2
  Eric Christopher authored May 19, 2011
```
Fixes rdar://9218925
Fixes PR9601

llvm-svn: 131682
```
  4014e5e2
- ADD64ri32 sign extends its argument, so we need to use a R_X86_64_32S. · 0fc5e89c
  Rafael Espindola authored May 19, 2011
```
Fixes PR9934.

We really need to start tblgening the relocation info :-(

llvm-svn: 131669
```
  0fc5e89c
- crc32 with 64-bit output zeros upper 32-bits. rdar://9467055 · 2b9bd386
  Evan Cheng authored May 19, 2011
```
llvm-svn: 131664
```
  2b9bd386
- Reverting 131641 to investigate 'bot complaint. · c72240bb
  Stuart Hastings authored May 19, 2011
```
llvm-svn: 131654
```
  c72240bb
- Revise MOVSX16rr8/MOVZX16rr8 (and rm variants) to no longer be · b476b0cc
  Stuart Hastings authored May 19, 2011
```
pseudos.  rdar://problem/8614450

llvm-svn: 131641
```
  b476b0cc
- Revert unintentional commit. · 6fc94dd6
  Eli Friedman authored May 18, 2011
```
llvm-svn: 131597
```
  6fc94dd6
- More instcombine simplifications towards better debug locations. · 1754a259
  Eli Friedman authored May 18, 2011
```
llvm-svn: 131596
```
  1754a259
- Reserve the segment registers on x86 to fix verifier failures in any code that · 9ddeceff
  Cameron Zwarich authored May 18, 2011
```
uses them.

llvm-svn: 131591
```
  9ddeceff
May 18, 2011
- Enables vararg functions that pass all arguments via registers to be optimized... · f4e832b1
  Chad Rosier authored May 18, 2011
```
Enables vararg functions that pass all arguments via registers to be optimized into tail-calls when possible.

llvm-svn: 131560
```
  f4e832b1
May 17, 2011
- Enable autodetect of popcnt · 6f6b44d1
  Mon P Wang authored May 17, 2011
```
llvm-svn: 131476
```
  6f6b44d1
- Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872. · 7b27942f
  Eli Friedman authored May 17, 2011
```
This is r131438 with a couple small fixes.

llvm-svn: 131474
```
  7b27942f
- Clean up the mess created by r131467+r131469. · d000a2c2
  Eli Friedman authored May 17, 2011
```
llvm-svn: 131471
```
  d000a2c2
- Revert 131467 due to buildbot complaint. · c65d8eda
  Stuart Hastings authored May 17, 2011
```
llvm-svn: 131469
```
  c65d8eda
- Fix an obscure issue in X86_64 parameter passing: if a tiny byval is · 3cf53088
  Stuart Hastings authored May 17, 2011
```
passed as the fifth parameter, insure it's passed correctly (in R9).
rdar://problem/6920088

llvm-svn: 131467
```
  3cf53088
- · d8edb1d5
  Nadav Rotem authored May 17, 2011
```
Fix a bug in PerformEXTRACT_VECTOR_ELTCombine. The code created an ADD SDNode
with two different types, in cases where the index and the ptr had different
types.

llvm-svn: 131461
```
  d8edb1d5
- Update comment. · 56a42ebf
  Eric Christopher authored May 17, 2011
```
llvm-svn: 131459
```
  56a42ebf
- Support XOR and AND optimization with no return value. · a1d9e295
  Eric Christopher authored May 17, 2011
```
Finishes off rdar://8470697

llvm-svn: 131458
```
  a1d9e295
- Couple less magic numbers. · abfe3131
  Eric Christopher authored May 17, 2011
```
llvm-svn: 131457
```
  abfe3131
- Make this code a little less magic number laden. · eb47a2a1
  Eric Christopher authored May 17, 2011
```
llvm-svn: 131456
```
  eb47a2a1
- add a note · 1e81f57b
  Chris Lattner authored May 17, 2011
```
llvm-svn: 131455
```
  1e81f57b
- Back out r131444 and r131438; they're breaking nightly tests. I'll look into · 7335e8a7
  Eli Friedman authored May 17, 2011
```
it more tomorrow.

llvm-svn: 131451
```
  7335e8a7
- Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872. · 83ba150f
  Eli Friedman authored May 17, 2011
```
llvm-svn: 131438
```
  83ba150f
May 16, 2011
- Remove dead code. Fix associated test to use FileCheck. · d4a3609d
  Eli Friedman authored May 16, 2011
```
llvm-svn: 131424
```
  d4a3609d
- Make fast-isel work correctly s/uadd.with.overflow intrinsics. · a4d4a016
  Eli Friedman authored May 16, 2011
```
llvm-svn: 131420
```
  a4d4a016
May 14, 2011
- Fix a FIXME by moving the fast-isel implementation of the objectsize intrinsic... · 8f1e11cd
  Eli Friedman authored May 14, 2011
```
Fix a FIXME by moving the fast-isel implementation of the objectsize intrinsic from the x86 code to the generic code.

llvm-svn: 131332
```
  8f1e11cd
- Don't produce a vmovntdq if we don't have AVX support. · df9db7ed
  Rafael Espindola authored May 14, 2011
```
llvm-svn: 131330
```
  df9db7ed
- Zap useless code; this hasn't done anything useful since fast-isel switched to... · f080a57b
  Eli Friedman authored May 14, 2011
```
Zap useless code; this hasn't done anything useful since fast-isel switched to being bottom-up (a very long time ago).

llvm-svn: 131329
```
  f080a57b
May 11, 2011
- Turn this into a table, this will make more sense shortly. · 2a9dbbbb
  Eric Christopher authored May 11, 2011
```
Part of rdar://8470697

llvm-svn: 131200
```
  2a9dbbbb
- · 8f971c27
  Nadav Rotem authored May 11, 2011
```
Add custom lowering of X86 vector SRA/SRL/SHL when the shift amount is a splat vector.

llvm-svn: 131179
```
  8f971c27
- Optimize atomic lock or that doesn't use the result value. · 4a34e61e
  Eric Christopher authored May 10, 2011
```
Next up: xor and and.

Part of rdar://8470697

llvm-svn: 131171
```
  4a34e61e
May 10, 2011
- Refactor lock versions of binary operators to be a little less · e3346466
  Eric Christopher authored May 10, 2011
```
cut and paste.

llvm-svn: 131139
```
  e3346466
May 08, 2011

X86: Add a bunch of peeps for add and sub of SETB. · d724a590

Benjamin Kramer authored May 08, 2011

"b + ((a < b) ? 1 : 0)" compiles into
	cmpl	%esi, %edi
	adcl	$0, %esi
instead of
	cmpl	%esi, %edi
	sbbl	%eax, %eax
	andl	$1, %eax
	addl	%esi, %eax

This saves a register, a false dependency on %eax
(Intel's CPUs still don't ignore it) and it's shorter.

llvm-svn: 131070

d724a590

May 06, 2011
- Make the logic for determining function alignment more explicit. No functionality change. · 2518f837
  Eli Friedman authored May 06, 2011
```
llvm-svn: 131012
```
  2518f837
- Dead code elimination. · a7160966
  Rafael Espindola authored May 06, 2011
```
llvm-svn: 130984
```
  a7160966
May 05, 2011

PR9848: pandn is not commutative. · f1e2b50a

Eli Friedman authored May 05, 2011

No test because I can't think of any way to write one that won't break quickly.

llvm-svn: 130932

f1e2b50a

Fix X86RegisterInfo::getMatchingSuperRegClass for sub_8bit_hi. · 808dca12

Jakob Stoklund Olesen authored May 04, 2011

It is OK for B to be any GR8_ABCD_H superclass, the returned register class
doesn't have to map surjectively onto B.

llvm-svn: 130892

808dca12