- Oct 14, 2012
-
-
Benjamin Kramer authored
Add a basic unit test for ImmutableMap. Found by inspection. llvm-svn: 165907
-
Benjamin Kramer authored
llvm-svn: 165904
-
Benjamin Kramer authored
Erasing from the beginning or middle of the vector is expensive, remove_if can do it in linear time even though it's a bit ugly without lambdas. No functionality change. llvm-svn: 165903
-
Bill Wendling authored
llvm-svn: 165902
-
Bill Wendling authored
llvm-svn: 165899
-
Benjamin Kramer authored
Can't follow the intrusive linked list when the element is gone. llvm-svn: 165898
-
Bill Wendling authored
llvm-svn: 165897
-
Bill Wendling authored
Remove the bitwise AND operators from the Attributes class. Replace it with the equivalent from the builder class. llvm-svn: 165896
-
Bill Wendling authored
Remove the bitwise assignment OR operator from the Attributes class. Replace it with the equivalent from the builder class. llvm-svn: 165895
-
Bill Wendling authored
Remove the bitwise OR operator from the Attributes class. Replace it with the equivalent from the builder class. llvm-svn: 165894
-
Bill Wendling authored
Remove the bitwise XOR operator from the Attributes class. Replace it with the equivalent from the builder class. llvm-svn: 165893
-
Bill Wendling authored
Remove the bitwise NOT operator from the Attributes class. Replace it with the equivalent from the builder class. llvm-svn: 165892
-
Bill Wendling authored
llvm-svn: 165891
-
Bill Wendling authored
llvm-svn: 165890
-
Bill Wendling authored
llvm-svn: 165889
-
Bill Wendling authored
llvm-svn: 165887
-
- Oct 13, 2012
-
-
Benjamin Kramer authored
llvm-svn: 165881
-
Benjamin Kramer authored
llvm-svn: 165880
-
Dmitri Gribenko authored
llvm-svn: 165879
-
Benjamin Kramer authored
llvm-svn: 165878
-
Jakob Stoklund Olesen authored
The new coalescer can merge a dead def into an unused lane of an otherwise live vector register. Clear the <dead> flag when that happens since the flag refers to the full virtual register which is still live after the partial dead def. This fixes PR14079. llvm-svn: 165877
-
Meador Inge authored
This patch migrates the strchr and strrchr optimizations from the simplify-libcalls pass into the instcombine library call simplifier. llvm-svn: 165875
-
Meador Inge authored
This patch migrates the strcat and strncat optimizations from the simplify-libcalls pass into the instcombine library call simplifier. llvm-svn: 165874
-
Meador Inge authored
This patch implements the new LibCallSimplifier class as outlined in [1]. In addition to providing the new base library simplification infrastructure, all the fortified library call simplifications were moved over to the new infrastructure. The rest of the library simplification optimizations will be moved over with follow up patches. NOTE: The original fortified library call simplifier located in the SimplifyFortifiedLibCalls class was not removed because it is still used by CodeGenPrepare. This class will eventually go away too. [1] http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-August/052283.html llvm-svn: 165873
-
Jakob Stoklund Olesen authored
It is possible that the live range of the value being pruned loops back into the kill MBB where the search started. When that happens, make sure that the beginning of KillMBB is also pruned. Instead of starting a DFS at KillMBB and skipping the root of the search, start a DFS at each KillMBB successor, and allow the search to loop back to KillMBB. This fixes PR14078. llvm-svn: 165872
-
Benjamin Kramer authored
llvm-svn: 165871
-
Chandler Carruth authored
type coercion code, especially when targetting ARM. Things like [1 x i32] instead of i32 are very common there. The goal of this logic is to ensure that when we are picking an alloca type, we look through such wrapper aggregates and across any zero-length aggregate elements to find the simplest type possible to form a type partition. This logic should (generally speaking) rarely fire. It only ends up kicking in when an alloca is accessed using two different types (for instance, i32 and float), and the underlying alloca type has wrapper aggregates around it. I noticed a significant amount of this occurring looking at stepanov_abstraction generated code for arm, and suspect it happens elsewhere as well. Note that this doesn't yet address truly heinous IR productions such as PR14059 is concerning. Those result in mismatched *sizes* of types in addition to mismatched access and alloca types. llvm-svn: 165870
-
Chandler Carruth authored
help the dragonegg builders, and no test case at this point, but this was one dimly plausible case I spotted by inspection. Hopefully will get a testcase from those bots soon-ish, and will tidy this up with proper testing. llvm-svn: 165869
-
Benjamin Kramer authored
X86 doesn't have i8 cmovs so isel would emit a branch. Emitting branches at this level is often not a good idea because it's too late for many optimizations to kick in. This solution doesn't add any extensions (truncs are free) and tries to avoid introducing partial register stalls by filtering direct copyfromregs. I'm seeing a ~10% speedup on reading a random .png file with libpng15 via graphicsmagick on x86_64/westmere, but YMMV depending on the microarchitecture. llvm-svn: 165868
-
Chandler Carruth authored
llvm-svn: 165867
-
Chandler Carruth authored
are single value types, the load and store should be directly based upon the alloca and then bitcasting can fix the type as needed afterward. This might in theory improve some of the IR coming out of SROA, but I don't expect big changes yet and don't have any test cases on hand. This is really just a cleanup/refactoring patch. The next patch will cause this code path to be hit a lot more, actually get SROA to promote more allocas and include several more test cases. llvm-svn: 165864
-
Chad Rosier authored
the interface between the front-end and the MC layer when parsing inline assembly. Unfortunately, this is too deep into the parsing stack. Specifically, we're unable to handle target-independent assembly (i.e., assembly directives, labels, etc.). Note the MatchAndEmitInstruction() isn't the correct abstraction either. I'll be exposing target-independent hooks shortly, so this is really just a cleanup. llvm-svn: 165858
-
Andrew Kaylor authored
Check section type rather than assuming it's code when emitting sections while processing relocations. llvm-svn: 165854
-
Manman Ren authored
local frame causes problem. For example: void f(StructToPass s) { g(&s, sizeof(s)); } will cause problem with tail-call since part of s is passed via registers and saved in f's local frame. When g tries to access s, part of s may be corrupted since f's local frame is popped out before the tail-call. The current fix is to disable tail-call if getVarArgsRegSaveSize is not 0 for the caller. This is a conservative approach, if we can prove the address of s or part of s is not taken and passed to g, it should be okay to perform tail-call. rdar://12442472 llvm-svn: 165853
-
Chad Rosier authored
llvm-svn: 165847
-
Jakob Stoklund Olesen authored
llvm-svn: 165846
-
Jim Grosbach authored
The backend already pattern matches to form VBSL when it can. We may want to teach it to use the vbsl intrinsics at some point to prevent machine licm from mucking with this, but using the Expand is completely correct. http://llvm.org/bugs/show_bug.cgi?id=13831 http://llvm.org/bugs/show_bug.cgi?id=13961 Patch by Peter Couperus <peter.couperus@st.com>. llvm-svn: 165845
-
Chad Rosier authored
MapAndConstraints vector. Also remove the unused Kind argument. llvm-svn: 165833
-
Chad Rosier authored
MCParsedAsmOperand class in support of ms-style inline assembly. llvm-svn: 165830
-
- Oct 12, 2012
-
-