- Jul 24, 2010
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Devang Patel authored
Use current working directory when Dirname is empty. This only happens when absolute source file path is used on compiler command line. llvm-svn: 109302
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Evan Cheng authored
appropriate for targets without detailed instruction iterineries. The scheduler schedules for increased instruction level parallelism in low register pressure situation; it schedules to reduce register pressure when the register pressure becomes high. On x86_64, this is a win for all tests in CFP2000. It also sped up 256.bzip2 by 16%. llvm-svn: 109300
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Bruno Cardoso Lopes authored
llvm-svn: 109295
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Jim Grosbach authored
function live in set. This will give us tGPR for Thumb1 and GPR otherwise, so the copy will be spillable. rdar://8224931 llvm-svn: 109293
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Jim Grosbach authored
to be of a different register class. For example, in Thumb1 if the live-in is a high register, we want the vreg to be a low register. rdar://8224931 llvm-svn: 109291
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Devang Patel authored
llvm-svn: 109285
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Dale Johannesen authored
comments explaining why it was wrong. 8225024. Fix the real problem in 8213383: the code that splits very large blocks when no other place to put constants can be found was not considering the case that the block contained a Thumb tablejump. llvm-svn: 109282
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Evan Cheng authored
it's too late to start backing off aggressive latency scheduling when most of the registers are in use so the threshold should be a bit tighter. - Correctly handle live out's and extract_subreg etc. - Enable register pressure aware scheduling by default for hybrid scheduler. For ARM, this is almost always a win on # of instructions. It's runtime neutral for most of the tests. But for some kernels with high register pressure it can be a huge win. e.g. 464.h264ref reduced number of spills by 54 and sped up by 20%. llvm-svn: 109279
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Bruno Cardoso Lopes authored
llvm-svn: 109276
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- Jul 23, 2010
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Dan Gohman authored
eliminate it. llvm-svn: 109270
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Dan Gohman authored
the BlockTraits abstractions. llvm-svn: 109268
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Dan Gohman authored
llvm-svn: 109267
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Dan Gohman authored
llvm-svn: 109266
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Dan Gohman authored
llvm-svn: 109265
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Devang Patel authored
llvm-svn: 109262
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Bruno Cardoso Lopes authored
llvm-svn: 109248
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Dan Gohman authored
are not demanded. This often allows the anyext to be folded away. llvm-svn: 109242
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Dan Gohman authored
llvm-svn: 109234
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Gabor Greif authored
llvm-svn: 109224
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Gabor Greif authored
llvm-svn: 109222
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Mikhail Glushenkov authored
llvm-svn: 109216
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Mikhail Glushenkov authored
llvmc can be now compiled with llvm-gcc on Windows. llvm-svn: 109215
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Bruno Cardoso Lopes authored
llvm-svn: 109207
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Bruno Cardoso Lopes authored
llvm-svn: 109206
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Eric Christopher authored
llvm-svn: 109205
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Bruno Cardoso Lopes authored
Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual llvm-svn: 109204
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Dale Johannesen authored
SSE, so we can't return floating point values if this is disabled. Detect this error for clang. With SSE1 only, f64 is a problem; it can be done, but neither llvm-gcc nor clang has ever generated correct code for it. Since nobody noticed this I think it's OK to treat it as an error for now. This also handles SSE-sized vectors of floating point. 8207686, 8204109. llvm-svn: 109201
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Bruno Cardoso Lopes authored
Fix some AVX instructions which didnt had HasAVX prefix. And also a problem with PINSRW, which was totally wrong because of a typo I introduced previously llvm-svn: 109198
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- Jul 22, 2010
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Chris Lattner authored
ARM/PPC/MSP430-specific code (which are the only targets that implement the hook) can directly reference their target-specific instrinfo classes. llvm-svn: 109171
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Chris Lattner authored
"yet another" copy of the dwarf EH emission code that was copied, pasted and slightly hacked up. llvm-svn: 109169
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Bruno Cardoso Lopes authored
Add remaining AVX instructions (most of them dealing with GR64 destinations. This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step llvm-svn: 109168
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Chris Lattner authored
llvm-svn: 109167
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Chris Lattner authored
This is probably not the best way to implement "Force LR to be spilled if the Thumb function size is > 2048." do this, it should use the branch shortening infrastructure, but I'm just preserving functionality here. llvm-svn: 109165
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Chris Lattner authored
llvm-svn: 109154
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Chris Lattner authored
rip out the implementation of X86InstrInfo::GetInstSizeInBytes. The code being ripped out just implemented a copy and hacked up version of the (old) instruction encoder, and is buggy and terrible in other ways. Since "GetInstSizeInBytes" is really only there to support the JIT's "NeedsExactSize" hook (which noone is using), just rip out the code. I will rip out the NeedsExactSize hook next. This resolves rdar://7617809 - switch X86InstrInfo::GetInstSizeInBytes to use X86MCCodeEmitter llvm-svn: 109149
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Devang Patel authored
llvm-svn: 109132
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Xerxes Ranby authored
llvm-svn: 109125
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Gabor Greif authored
llvm-svn: 109122
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Devang Patel authored
A non function local MDNode can have an operand which is cloned by MapValue(). llvm-svn: 109117
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Gabor Greif authored
llvm-svn: 109104
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