llvm-svn: 171931

llvm-svn: 171930

Cost Model: Move the 'max unroll factor' variable to the TTI and add initial Cost Model support on ARM.

llvm-svn: 171928

This is easier implemented now that bundle flags are symmetric.

llvm-svn: 171927

(There already has a concise comment to the declaration.)

Thank Eric Christopher for his feedback!

llvm-svn: 171926

llvm-svn: 171924

This is causing some problems. The root cause is unknown at this time.

llvm-svn: 171923

  - this expression is explicitly marked no-signed-zero, or
  - no-signed-zero of this expression can be derived from some context.

llvm-svn: 171922

llvm-svn: 171905

method because getContents().size() already covers it. So computeFragmentSize
can use the generic MCEncodedFragment interface when querying both Data and
Relaxable fragments for contents sizes.

No change in functionality

llvm-svn: 171903

Stop using BumpPtrAllocator for HNodes because
they have fields (vector, map) which require HNode 
destructors to be run.

llvm-svn: 171896

This avoids FileCheck failing over different comment characters in
assembly (notably powerpc64 on Linux vs Darwin) and should fix David's
build-bot.

llvm-svn: 171886

an R_MIPS_GPREL16 relocation.


Contributer: Jack Carter
llvm-svn: 171882

value in the 64 bit .eh_frame section.

It doesn't however allow exception handling to work
yet since it depends on the correct relocation model
being set in the ELF header flags.


Contributer: Jack Carter
llvm-svn: 171881

The current Intel Atom microarchitecture has a feature whereby
when a function returns early then it is slightly faster to execute
a sequence of NOP instructions to wait until the return address is ready,
as opposed to simply stalling on the ret instruction until
the return address is ready.

When compiling for X86 Atom only, this patch will run a pass,
called "X86PadShortFunction" which will add NOP instructions where less
than four cycles elapse between function entry and return.

It includes tests.

This patch has been updated to address Nadav's review comments
- Optimize only at >= O1 and don't do optimization if -Os is set
- Stores MachineBasicBlock* instead of BBNum
- Uses DenseMap instead of std::map
- Fixes placement of braces

Patch by Andy Zhang.

llvm-svn: 171879

llvm-svn: 171873

llvm-svn: 171872

Code cleanup: refactor the switch statements in the generation of reduction variables into an IR builder call.

llvm-svn: 171871

llvm-svn: 171868

llvm-svn: 171867

llvm-svn: 171866

llvm-svn: 171863

PR14782

llvm-svn: 171846

Current targets don't have more than 256 relocations so they don't hit this
limit, but ELF64 actually allows more than 8 bits for a relocation type. These
were being truncated on AArch64.

llvm-svn: 171845

one file where it is called as a static function. Nuke the declaration
and the definition in lib/CodeGen, along with the include of
SelectionDAG.h from this file.

There is no dependency edge from lib/CodeGen to
lib/CodeGen/SelectionDAG, so it isn't valid for a routine in lib/CodeGen
to reference the DAG. There is a dependency from
lib/CodeGen/SelectionDAG on lib/CodeGen. This breaks one violation of
this layering.

llvm-svn: 171842

Suggested by Dave Blaikie.

llvm-svn: 171839

This closes PR14709 and hopefully is a small step towards preventing
similar issues in the future.

llvm-svn: 171837

make sure that vector types do work.

llvm-svn: 171833

llvm-svn: 171832

llvm-svn: 171829

llvm-svn: 171826

No change in functionality.

llvm-svn: 171822

llvm-svn: 171821

Previously, 4 bits were unused.

llvm-svn: 171814

This shrinks MachineInstr to 64 bytes (from 72).

llvm-svn: 171813

llvm-svn: 171812

make into the last commit.

Also, update the test-generation script to generate an exhaustive test for
align_to_end as well, and include the generated test.

llvm-svn: 171811

Thank Eric Christopher for figuring out these problems!

llvm-svn: 171805

llvm-svn: 171804

llvm-svn: 171803