on Darwin to remove smarts from the isel.  This is currently disabled by
default (uncomment setOperationAction(ISD::GlobalAddress to enable it).
tblgen needs to become smarter about tglobaladdr nodes and bigger patterns
needed to be added to the .td file.  However, we can currently emit stuff like
this:  :)

        li r2, lo16(L_x$non_lazy_ptr)
        lis r3, ha16(L_x$non_lazy_ptr)
        lwzx r2, r3, r2

The obvious improvements will follow.

llvm-svn: 24390

allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).

llvm-svn: 23802

redundant after the change.

llvm-svn: 23759

llvm-svn: 23743

are allowed to generate 64-bit-only PowerPC instructions for 32 bit hosts,
such as the PowerPC 970.

This speeds up 189.lucas from 81.99 to 32.64 seconds.

llvm-svn: 23250

getting them out of the business of making stack slots.

llvm-svn: 23180

llvm-svn: 23101

giving it a non-instruction opcode.  The dag->dag selector used to not
select the operands of the fsel, because it thought that whole tree was
already selected.

llvm-svn: 23091

instead of in the backend.  This currently handles fsel cases with registers,
but doesn't have the 0.0 and -0.0 optimization enabled yet.

Once this is finished, special hack for fp immediates can go away.

llvm-svn: 23075

can be shared with the DAG->DAG selector.

llvm-svn: 22799