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  1. Jun 28, 2012
  2. Jun 27, 2012
  3. Jun 26, 2012
    • Benjamin Kramer's avatar
      Implement getHostCPUName for ARM/linux. This will be used to implement -march=native in clang. · efe40286
      Benjamin Kramer authored
      The cpuid registers are only available in privileged mode so we don't have
      an OS-independent way of implementing this. ARM doesn't provide a list of
      processor IDs so the list is somewhat incomplete.
      
      llvm-svn: 159228
      efe40286
    • Rafael Espindola's avatar
      Fix llc's -print-before=pass and -print-after=pass. · e0eaa043
      Rafael Espindola authored
      llvm-svn: 159227
      e0eaa043
    • Manman Ren's avatar
      X86: add GATHER intrinsics (AVX2) in LLVM · a0982041
      Manman Ren authored
      Support the following intrinsics:
      llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd
      llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256
      llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps
      llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256
      
      Modified Disassembler to handle VSIB addressing mode.
      
      llvm-svn: 159221
      a0982041
    • Tim Northover's avatar
      Teach TableGen to put chains on more instructions · e5629966
      Tim Northover authored
      When generating selection tables for Pat instances, TableGen relied on
      an output Instruction's Pattern field being set to infer whether a
      chain should be added.
      
      This patch adds additional logic to check various flag fields so that
      correct code can be generated even if Pattern is unset.
      
      llvm-svn: 159217
      e5629966
    • Argyrios Kyrtzidis's avatar
      Fix ThreadLocalImpl::getInstance for --disable-threads. · 46785f94
      Argyrios Kyrtzidis authored
      PR13114.
      
      llvm-svn: 159210
      46785f94
    • Jakob Stoklund Olesen's avatar
      Allow targets to inject passes before the virtual register rewriter. · 59a0d324
      Jakob Stoklund Olesen authored
      Such passes can be used to tweak the register assignments in a
      target-dependent way, for example to avoid write-after-write
      dependencies.
      
      llvm-svn: 159209
      59a0d324
    • Stepan Dyatkovskiy's avatar
      IntegersSubsetTest: Due to compilation failure with -std=c11, replaced -1UL... · 593d358c
      Stepan Dyatkovskiy authored
      IntegersSubsetTest: Due to compilation failure with -std=c11, replaced -1UL with NOT_A_NUMBER constant (0xffff).
      
      llvm-svn: 159207
      593d358c
    • Jack Carter's avatar
      There are a number of generic inline asm operand modifiers that · 5e69cffe
      Jack Carter authored
      up to r158925 were handled as processor specific. Making them 
      generic and putting tests for these modifiers in the CodeGen/Generic
      directory caused a number of targets to fail. 
      
      This commit addresses that problem by having the targets call 
      the generic routine for generic modifiers that they don't currently
      have explicit code for.
      
      For now only generic print operands 'c' and 'n' are supported.vi
      
      
      Affected files:
      
          test/CodeGen/Generic/asm-large-immediate.ll
          lib/Target/PowerPC/PPCAsmPrinter.cpp
          lib/Target/NVPTX/NVPTXAsmPrinter.cpp
          lib/Target/ARM/ARMAsmPrinter.cpp
          lib/Target/XCore/XCoreAsmPrinter.cpp
          lib/Target/X86/X86AsmPrinter.cpp
          lib/Target/Hexagon/HexagonAsmPrinter.cpp
          lib/Target/CellSPU/SPUAsmPrinter.cpp
          lib/Target/Sparc/SparcAsmPrinter.cpp
          lib/Target/MBlaze/MBlazeAsmPrinter.cpp
          lib/Target/Mips/MipsAsmPrinter.cpp
          
      MSP430 isn't represented because it did not even run with
      the long existing 'c' modifier and it was not apparent what
      needs to be done to get it inline asm ready.
      
      Contributer: Jack Carter
      llvm-svn: 159203
      5e69cffe
    • Duncan Sands's avatar
      Replacing zero-sized alloca's with a null pointer is too aggressive, instead · 8bc764ae
      Duncan Sands authored
      merge all zero-sized alloca's into one, fixing c43204g from the Ada ACATS
      conformance testsuite.  What happened there was that a variable sized object
      was being allocated on the stack, "alloca i8, i32 %size".  It was then being
      passed to another function, which tested that the address was not null (raising
      an exception if it was) then manipulated %size bytes in it (load and/or store).
      The optimizers cleverly managed to deduce that %size was zero (congratulations
      to them, as it isn't at all obvious), which made the alloca zero size, causing
      the optimizers to replace it with null, which then caused the check mentioned
      above to fail, and the exception to be raised, wrongly.  Note that no loads
      and stores were actually being done to the alloca (the loop that does them is
      executed %size times, i.e. is not executed), only the not-null address check.
      
      llvm-svn: 159202
      8bc764ae
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