llvm-svn: 30628

a function, do it up front in linear time (going through all of the
instructions once). We create a map out of them. Then it's no problem to
use the information in it during elimination...

llvm-svn: 30624

llvm-svn: 29911

llvm-svn: 29648

llvm-svn: 29220

dropped.  This shrinks libllvmgcc.dylib another 67K

llvm-svn: 28975

use virtual registers.  We now allow the first instruction in a block of
terminators to use virtual registers, and update phi elimination to correctly
update livevar when eliminating phi's.  This fixes a problem on a testcase
Andrew sent me.

llvm-svn: 25083

don't help anyone)

llvm-svn: 25081

llvm-svn: 23609

llvm-svn: 23606

llvm-svn: 22992

* Remove commented-out debug printouts

llvm-svn: 21707

llvm-svn: 21439

llvm-svn: 21420

Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.

llvm-svn: 16137

the live intervals for some registers.

llvm-svn: 15125

llvm-svn: 15118

ask instructions for their parent.

llvm-svn: 14998

llvm-svn: 14997

map.

llvm-svn: 14518

llvm-svn: 13956

broke obsequi and a lot of other things.  It all boiled down to MBB being
overloaded in an inner scope and me confusing it with the one in the outer
scope.  Ugh!

llvm-svn: 13517

phi-elimination from 0.6 to 0.54s on kc++.

llvm-svn: 13454

in the basic block being processed.  This fixes PhiElimination on kimwitu++
from taking 105s to taking a much more reasonable 0.6s (in a debug build).

llvm-svn: 13453

than before.  Because this is the case, we can compute the first non-phi
instruction once when de-phi'ing a block.  This shaves ~4s off of
phielimination of _Z7yyparsev in kimwitu++ from 109s -> 105s.  There are
still much more important gains to come.

llvm-svn: 13452

llvm-svn: 13302

llvm-svn: 12571

llvm-svn: 11757

block into MachineBasicBlock::getFirstTerminator().

This also fixes a bug in the implementation of the above in both
RegAllocLocal and InstrSched, where instructions where added after the
terminator if the basic block's only instruction was a terminator (it
shouldn't matter for RegAllocLocal since this case never occurs in
practice).

llvm-svn: 11748

llvm-svn: 11430

llvm-svn: 11393

ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.

llvm-svn: 11340

llvm-svn: 11283

    a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
    b) add isUse(), isDef()
    c) rename opHiBits32() to isHiBits32(),
              opLoBits32() to isLoBits32(),
              opHiBits64() to isHiBits64(),
              opLoBits64() to isLoBits64().

This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.

llvm-svn: 10461

llvm-svn: 9903

Header files will be on the way.

llvm-svn: 9298

llvm-svn: 7349

llvm-svn: 6624

    Fixed spilling of %fcc[0-3] which are part of %fsr.

(2) Moved some machine-independent reg-class code to class TargetRegInfo
    from SparcReg{Class,}Info.

(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
    and related functions and flags.  Fixed several bugs where only
    "isDef" was being checked, not "isDefAndUse".

llvm-svn: 6341

llvm-svn: 6131